463
SAM4CP [DATASHEET]
43051E–ATPL–08/14
27.8.1.1 TxRx Buffers
There are 4 dedicated buffers for transmission (BUF_TX0, BUF_TX1, BUF_TX2 and BUF_TX3) and 4 dedicated buffers
for reception (BUF_RX0, BUF_RX1, BUF_RX2, BUF_RX3). The main features are shown below:
27.8.1.2 Transmission Branch
PHY layer takes data to be sent from BUF_TXi. The Cyclic Redundancy Check (CRC) fields are hardware-generated in
real time, and properly appended to the transmission data. The rest of the chain is hardware-wired, and performs
automatically all the tasks needed to send data according to PRIME specifications.
In the following figure
,
the block diagram of the transmission branch is shown.
Figure 27-7.
Transmission Branch
The output is differential modulated using a DBPSK/DQPSK/D8PSK scheme. After modulation, IFFT (Inverse Fourier
Transform) block and cyclic prefix block allow to implement an OFDM scheme.
A Converter and a Power Amplifier Driver is the last block in the transmission branch. This block is responsible for
adjusting the signal to reach the best transmission efficiency, thus reducing consumption and power dissipation.
27.8.1.3 Reception Branch
The reception branch performs automatically all the tasks needed to process received data. PHY layer delivers data to
MAC layer through the BUF_RXi.
Figure 27-8.
Reception Branch
Table 27-4.
TxRx Buffers features
BUF_TXi
Size configurable
Number of buffers enabled configurable
Start time forced or programmed
Transmission can be forced regardless of the
carrier detection and frames reception
Transmission parameters configurable
Error detector
BUF_RXi
Size configurable
Number of buffers enabled configurable
Enable/Disable interrupts
Parameters saved (BER, RSSI, CINR…)
CRC
Scrambler
Interleaver
IFFT
Tx
Convolutional
Encoder
Sub-carrier
Modulator
Cyclic
Prefix
Converter / PAD
From
BUF_TXi
Rx
to
BUF_RXi
Scrambler
Interleaver
Convolutional
Decoder
FFT
Sub - carrier
Demodulator
CRC
Pre - FFT
Syncro
Converter