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參數(shù)資料
| 型號： | E0C6S27Q6 |
| 英文描述： | 4-Bit Microcontroller |
| 中文描述： | 4位微控制器 |
| 文件頁數(shù)： | 10/12頁 |
| 文件大?。?/td> | 123K |
| 代理商： | E0C6S27Q6 |
7
E0C6S32
1: The SVD circuit is in the ON status (HLMOD="1", BLS="0"). The analog comparator is in the OFF status.
Unit
V
S
V
mV
mS
A
(Unless otherwise specified: VDD=0V, VSS=-1.5V, fOSC1=32.768kHz, Ta=25
°C, CG=25pF, VS1/VL1–VL3 are internal voltage, C1–C5=0.1F)
Max.
-0.95
2VL1
×0.85
3VL1
×0.85
-1.10
100
VDD-0.9
20
3
34.0
40.0
Typ.
-1.05
-1.20
11.2
14.5
Min.
-1.15
2VL1
-0.1
3VL1
-0.1
-1.30
VSS+0.3
Characteristic
Internal voltage
SVD voltage
SVD circuit response time
Analog comparator
input voltage
Analog comparator
offset voltage
Analog comparator
response time
Current consumption
Symbol
VL1
VL2
VL3
VSVD
tSVD
VIP
VIM
VOF
tAMP
IOP
Condition
Connect 1M
load resistor between VDD and VL1
(without panel load)
Connect 1M
load resistor between VDD and VL2
(without panel load)
Connect 1M
load resistor between VDD and VL3
(without panel load)
Noninverted input (AMPP)
Inverted input (AMPM)
VIP=-1.1V, VIM=VIP
±30mV
During HALT *1
During operation *1
Without panel load
E0C6SL32 (Heavy Load Protection Mode)
E0C6SB32 (Normal Mode)
1: The SVD circuit and analog comparator are in the OFF status.
Unit
V
S
V
mV
mS
A
(Unless otherwise specified: VDD=0V, VSS=-1.5V, fOSC1=32.768kHz, Ta=25
°C, CG=25pF, VS1/VL1–VL3 are internal voltage, C1–C5=0.1F)
Max.
-0.95
2VL1
×0.9
3VL1
×0.9
-1.10
100
VDD-0.9
20
3
1.5
4.0
Typ.
-1.05
-1.20
0.65
2.0
Min.
-1.15
2VL1
-0.1
3VL1
-0.1
-1.30
VSS+0.3
Characteristic
Internal voltage
SVD voltage
SVD circuit response time
Analog comparator
input voltage
Analog comparator
offset voltage
Analog comparator
response time
Current consumption
Symbol
VL1
VL2
VL3
VSVD
tSVD
VIP
VIM
VOF
tAMP
IOP
Condition
Connect 1M
load resistor between VDD and VL1
(without panel load)
Connect 1M
load resistor between VDD and VL2
(without panel load)
Connect 1M
load resistor between VDD and VL3
(without panel load)
Noninverted input (AMPP)
Inverted input (AMPM)
VIP=-1.1V, VIM=VIP
±30mV
During HALT
During operation *1
Without panel load
E0C6SB32 (Heavy Load Protection Mode)
1: The SVD circuit is in the ON status (HLMOD="1", BLS="0"). The analog comparator is in the OFF status.
Unit
V
S
V
mV
mS
A
(Unless otherwise specified: VDD=0V, VSS=-1.5V, fOSC1=32.768kHz, Ta=25
°C, CG=25pF, VS1/VL1–VL3 are internal voltage, C1–C5=0.1F)
Max.
-0.95
2VL1
×0.85
3VL1
×0.85
-1.10
100
VDD-0.9
20
3
34.0
40.0
Typ.
-1.05
-1.20
11.2
14.5
Min.
-1.15
2VL1
-0.1
3VL1
-0.1
-1.30
VSS+0.3
Characteristic
Internal voltage
SVD voltage
SVD circuit response time
Analog comparator
input voltage
Analog comparator
offset voltage
Analog comparator
response time
Current consumption
Symbol
VL1
VL2
VL3
VSVD
tSVD
VIP
VIM
VOF
tAMP
IOP
Condition
Connect 1M
load resistor between VDD and VL1
(without panel load)
Connect 1M
load resistor between VDD and VL2
(without panel load)
Connect 1M
load resistor between VDD and VL3
(without panel load)
Noninverted input (AMPP)
Inverted input (AMPM)
VIP=-1.1V, VIM=VIP
±30mV
During HALT *1
During operation *1
Without panel load
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