參數(shù)資料
型號(hào): DT28F160F3B120
廠商: INTEL CORP
元件分類(lèi): DRAM
英文描述: FAST BOOT BLOCK FLASH MEMORY FAMILY 8 AND 16 MBIT
中文描述: 1M X 16 FLASH 2.7V PROM, 120 ns, PDSO56
封裝: 16 X 23.70 MM, SSOP-56
文件頁(yè)數(shù): 38/47頁(yè)
文件大?。?/td> 277K
代理商: DT28F160F3B120
FAST BOOT BLOCK DATASHEET
E
38
PRODUCT PREVIEW
8.6
AC Characteristics
—Write Operations
(1, 2)
—Extended Temperature
Valid for All Speed and
Voltage Combinations
#
Sym
Parameter
Notes
Min
Max
Unit
W1
t
PHWL
(t
PHEL
)
RST# High Recovery to WE# (CE#) Going
Low
3
600
μs
W2
t
ELWL
(t
WLEL
)
CE# (WE#) Setup to WE# (CE#) Going Low
6
0
ns
W3
t
WP
Write Pulse Width
6
75
ns
W4
t
VLVH
ADV# Pulse Width
10
ns
W5
t
DVWH
(t
DVEH
)
Data Setup to WE# (CE#) Going High
4
70
ns
W6
t
AVWH
(t
AVEH
)
Address Setup to WE# (CE#) Going High
4
75
ns
W7
t
VLEH
(t
VLWH
)
ADV# Setup to WE# (CE#) Going High
75
ns
W8
t
AVVH
Address Setup to ADV# Going High
10
ns
W9
t
WHEH
(t
EHWH
)
CE# (WE#) Hold from WE# (CE#) High
0
ns
W10
t
WHDX
(t
EHDX
)
Data Hold from WE# (CE#) High
0
ns
W11
t
WHAX
(t
EHAX
)
Address Hold from WE# (CE#) High
0
ns
W12
t
VHAX
Address Hold from ADV# Going High
3
ns
W13
t
WPH
Write Pulse Width High
7
20
ns
W14
t
PHWH
(t
PHHEH
)
WP# Setup to WE# (CE#) Going High
3
200
ns
W15
t
VPWH
(t
VPEH
)
V
PP
Setup to WE# (CE#) Going High
3
200
ns
W16
t
WHGL
(t
EHGL
)
Write Recovery before Read
0
ns
W17
t
QVBH
WP# Hold from Valid SRD
3,5
0
ns
W18
t
QVVL
V
PP
Hold from Valid SRD
3,5
0
ns
NOTES:
1.
Read timing characteristics during block erase and program operations are the same as during read-only operations. Refer
to AC Characteristics
—Read-Only Operations
.
A write operation can be initiated and terminated with either CE# or WE#.
Sampled, not 100% tested.
Refer to Table 3 for valid A
IN
and D
IN
for block erase or program.
V
PP
should be held at V
PPH1/2
until determination of block erase or program success.
Write pulse width (t
) is defined from CE# or WE# going low (whichever goes low last) to CE# or WE# going high
(whichever goes high first). Hence, t
WP
= t
WLWH
= t
ELEH
= t
WLEH
= t
ELWH
.
Write pulse width high (t
) is defined from CE# or WE# going high (whichever goes high first) to CE# or WE# going low
(whichever goes low last). Hence, t
WPH
= t
WHWL
= t
EHEL
= t
WHEL
= t
EHWL
.
2.
3.
4.
5.
6.
7.
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