參數(shù)資料
型號(hào): DSPIC33FJ128GP710-I/PT
廠商: Microchip Technology
文件頁(yè)數(shù): 78/90頁(yè)
文件大?。?/td> 0K
描述: IC DSPIC MCU/DSP 128K 100TQFP
產(chǎn)品培訓(xùn)模塊: dsPIC33F DMAC
Introduction to dsPIC33F Architecture Part 1
Asynchronous Stimulus
Introduction to dsPIC33F Architecture Part 2
特色產(chǎn)品: PIC24FJ/33FJ MCUs & dsPIC? DSCs
標(biāo)準(zhǔn)包裝: 119
系列: dsPIC™ 33F
核心處理器: dsPIC
芯體尺寸: 16-位
速度: 40 MIP
連通性: CAN,I²C,IrDA,LIN,SPI,UART/USART
外圍設(shè)備: AC'97,欠壓檢測(cè)/復(fù)位,DMA,I²S,POR,PWM,WDT
輸入/輸出數(shù): 85
程序存儲(chǔ)器容量: 128KB(128K x 8)
程序存儲(chǔ)器類型: 閃存
RAM 容量: 16K x 8
電壓 - 電源 (Vcc/Vdd): 3 V ~ 3.6 V
數(shù)據(jù)轉(zhuǎn)換器: A/D 32x10b/12b
振蕩器型: 內(nèi)部
工作溫度: -40°C ~ 85°C
封裝/外殼: 100-TQFP
包裝: 托盤
產(chǎn)品目錄頁(yè)面: 654 (CN2011-ZH PDF)
配用: 876-1001-ND - DSPIC33 BREAKOUT BOARD
AC164333-ND - MODULE SKT FOR PM3 100QFP
DM300024-ND - KIT DEMO DSPICDEM 1.1
DV164033-ND - KIT START EXPLORER 16 MPLAB ICD2
MA330012-ND - MODULE DSPIC33 100P TO 84QFP
MA330011-ND - MODULE DSPIC33 100P TO 100QFP
DM240001-ND - BOARD DEMO PIC24/DSPIC33/PIC32
DV164005-ND - KIT ICD2 SIMPLE SUIT W/USB CABLE
dsPIC33F
DS70155C-page 6
Preliminary
2005 Microchip Technology Inc.
2.0
dsPIC33F DEVICE FAMILY
OVERVIEW
The dsPIC33F device family employs a powerful 16-bit
architecture that seamlessly integrates the control
features
of
a
Microcontroller
(MCU)
with
the
computational capabilities of a Digital Signal Processor
(DSP).
The
resulting
functionality
is
ideal
for
applications
that
rely
on
high-speed,
repetitive
computations, as well as control.
The DSP engine, dual 40-bit accumulators, hardware
support for division operations, barrel shifter, 17 x 17
multiplier, a large array of 16-bit working registers and
a wide variety of data addressing modes, together
provide the dsPIC33F Central Processing Unit (CPU)
with extensive mathematical processing capability.
Flexible and deterministic interrupt handling, coupled
with a powerful array of peripherals, renders the
dsPIC33F devices suitable for control applications.
Further,
Direct
Memory
Access
(DMA)
enables
overhead-free
transfer of data
between
several
peripherals and a dedicated DMA RAM. Reliable, field
programmable
Flash
program
memory
ensures
scalability of applications that use dsPIC33F devices.
Figure 2-1 shows a sample device block diagram
typical of the dsPIC33F product family.
FIGURE 2-1:
dsPIC33F DEVICE BLOCK DIAGRAM
Barrel Shifter
ACCA<40>
ACCB<40>
DSP Engine
Divide Control
17 x 17 Multiplier
W Register
Array
16 x 16
Memory
Mapped
16-bit ALU
Program Flash
Memory Data
Access
Y AGU
X AGU
Program Counter
<23 bits>
Instruction
Prefetch & Decode
X-Data Bus <16-bit>
Y-Data Bus <16-bit>
Data SRAM
up to
28 Kbytes
Flash
Program
Memory
up to
256 Kbytes
Peripherals
I/O Ports
24
23
Legend:
MCU/DSP X-Data Path
DSP Y-Data Path
Address Path
Status Register
Dual Port
RAM
2 Kbytes
DMA
Controller
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