參數(shù)資料
型號: DSPIC33FJ128GP708-I/PT
廠商: Microchip Technology
文件頁數(shù): 59/90頁
文件大?。?/td> 0K
描述: IC DSPIC MCU/DSP 128K 80TQFP
產(chǎn)品培訓模塊: Introduction to dsPIC33F Architecture Part 1
Asynchronous Stimulus
Introduction to dsPIC33F Architecture Part 2
特色產(chǎn)品: PIC24FJ/33FJ MCUs & dsPIC? DSCs
標準包裝: 119
系列: dsPIC™ 33F
核心處理器: dsPIC
芯體尺寸: 16-位
速度: 40 MIP
連通性: CAN,I²C,IrDA,LIN,SPI,UART/USART
外圍設(shè)備: AC'97,欠壓檢測/復位,DMA,I²S,POR,PWM,WDT
輸入/輸出數(shù): 69
程序存儲器容量: 128KB(128K x 8)
程序存儲器類型: 閃存
RAM 容量: 16K x 8
電壓 - 電源 (Vcc/Vdd): 3 V ~ 3.6 V
數(shù)據(jù)轉(zhuǎn)換器: A/D 24x10b/12b
振蕩器型: 內(nèi)部
工作溫度: -40°C ~ 85°C
封裝/外殼: 80-TQFP
包裝: 托盤
產(chǎn)品目錄頁面: 654 (CN2011-ZH PDF)
配用: 876-1001-ND - DSPIC33 BREAKOUT BOARD
DM300024-ND - KIT DEMO DSPICDEM 1.1
DV164033-ND - KIT START EXPLORER 16 MPLAB ICD2
MA330012-ND - MODULE DSPIC33 100P TO 84QFP
MA330011-ND - MODULE DSPIC33 100P TO 100QFP
DM300019-ND - BOARD DEMO DSPICDEM 80L STARTER
DM240001-ND - BOARD DEMO PIC24/DSPIC33/PIC32
AC164328-ND - MODULE SKT FOR 80TQFP
DV164005-ND - KIT ICD2 SIMPLE SUIT W/USB CABLE
dsPIC33F
DS70155C-page 60
Preliminary
2005 Microchip Technology Inc.
APPENDIX A:
DEVICE I/O PINOUTS
AND FUNCTIONS
FOR GENERAL
PURPOSE FAMILY
Table A-1 provides a brief description of device I/O
pinouts and functions that can be multiplexed to a port
pin. Multiple functions may exist on one port pin. When
multiplexing occurs, the peripheral module’s functional
requirements may force an override of the data
direction of the port pin.
TABLE A-1:
PINOUT I/O DESCRIPTIONS FOR GENERAL PURPOSE FAMILY
Pin Name
Pin
Type
Input Buffer
Type
Description
AN0-AN23
I
Analog
Analog input channels.
AVDD
P
Positive supply for analog module.
AVSS
P
Ground reference for analog module.
CLKI
CLKO
I
O
ST/CMOS
External clock source input. Always associated with OSC1 pin
function.
Oscillator crystal output. Connects to crystal or resonator in Crystal
Oscillator mode. Optionally functions as CLKO in RC and EC modes.
Always associated with OSC2 pin function.
CN0-CN23
I
ST
Input change notification inputs. Can be software programmed for
internal weak pull-ups on all inputs.
COFS
CSCK
CSDI
CSDO
I/O
I
O
ST
Data Converter Interface frame synchronization pin.
Data Converter Interface serial clock input/output pin.
Data Converter Interface serial data input pin.
Data Converter Interface serial data output pin.
C1RX
C1TX
C2RX
C2TX
I
O
I
O
ST
ST
ECAN1 bus receive pin.
ECAN1 bus transmit pin.
ECAN2 bus receive pin.
ECAN2 bus transmit pin.
PGD1/EMUD1
PGC1/EMUC1
PGD2/EMUD2
PGC2/EMUC2
PGD3/EMUD3
PGC3/EMUC3
I/O
I
I/O
I
I/O
I
ST
Data I/O pin for programming/debugging communication channel 1.
Clock input pin for programming/debugging communication channel 1.
Data I/O pin for programming/debugging communication channel 2.
Clock input pin for programming/debugging communication channel 2.
Data I/O pin for programming/debugging communication channel 3.
Clock input pin for programming/debugging communication channel 3.
IC1-IC8
I
ST
Capture inputs 1 through 8.
INT0
INT1
INT2
INT3
INT4
I
ST
External interrupt 0.
External interrupt 1.
External interrupt 2.
External interrupt 3.
External interrupt 4.
MCLR
I/P
ST
Master Clear (Reset) input or programming voltage input. This pin is
an active-low Reset to the device.
OCFA
OCFB
OC1-OC8
I
O
ST
Compare Fault A input (for Compare Channels 1, 2, 3 and 4).
Compare Fault B input (for Compare Channels 5, 6, 7 and 8).
Compare outputs 1 through 8.
OSC1
OSC2
I
I/O
ST/CMOS
Oscillator crystal input. ST buffer when configured in RC mode;
CMOS otherwise.
Oscillator crystal output. Connects to crystal or resonator in Crystal
Oscillator mode. Optionally functions as CLKO in RC and EC modes.
RA0-RA7
RA9-RA10
RA12-RA15
I/O
ST
PORTA is a bidirectional I/O port.
RB0-RB15
I/O
ST
PORTB is a bidirectional I/O port.
Legend:
CMOS = CMOS compatible input or output; Analog = Analog input
ST = Schmitt Trigger input with CMOS levels; O = Output; I = Input; P = Power
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