參數(shù)資料
型號: DSPIC30F3014-20I/ML
廠商: Microchip Technology
文件頁數(shù): 94/153頁
文件大?。?/td> 0K
描述: IC DSPIC MCU/DSP 24K 44QFN
產(chǎn)品培訓模塊: Serial Communications using dsPIC30F I2C
Serial Communications using dsPIC30F SPI
Serial Communications using dsPIC30F UART
dsPIC30F 12 bit ADC - Part 2
dsPIC30F Addressing Modes - Part 1
dsPIC30F Architecture - Part 1
dsPIC30F DSP Engine & ALU
dsPIC30F Interrupts
dsPIC30F Motor Control PWM
dsPIC Timers
Asynchronous Stimulus
dsPIC30F Addressing Modes - Part 2
dsPIC30F Architecture - Part 2
dsPIC30F 12-bit ADC Part 1
標準包裝: 45
系列: dsPIC™ 30F
核心處理器: dsPIC
芯體尺寸: 16-位
速度: 20 MIPS
連通性: I²C,SPI,UART/USART
外圍設(shè)備: 欠壓檢測/復(fù)位,POR,PWM,WDT
輸入/輸出數(shù): 30
程序存儲器容量: 24KB(8K x 24)
程序存儲器類型: 閃存
EEPROM 大?。?/td> 1K x 8
RAM 容量: 2K x 8
電壓 - 電源 (Vcc/Vdd): 2.5 V ~ 5.5 V
數(shù)據(jù)轉(zhuǎn)換器: A/D 13x12b
振蕩器型: 內(nèi)部
工作溫度: -40°C ~ 85°C
封裝/外殼: 44-VQFN 裸露焊盤
包裝: 管件
配用: XLT44QFN2-ND - SOCKET TRAN ICE 44QFN/40DIP
AC164322-ND - MODULE SOCKET MPLAB PM3 28/44QFN
其它名稱: DSPIC30F301420IML
2010 Microchip Technology Inc.
DS70138G-page 45
dsPIC30F3014/4013
5.6
Programming Operations
A complete programming sequence is necessary for
programming or erasing the internal Flash in RTSP
mode. A programming operation is nominally 2 msec in
duration and the processor stalls (waits) until the oper-
ation is finished. Setting the WR bit (NVMCON<15>)
starts the operation and the WR bit is automatically
cleared when the operation is finished.
5.6.1
PROGRAMMING ALGORITHM FOR
PROGRAM FLASH
The user can erase or program one row of program
Flash memory at a time. The general process is:
1.
Read one row of program Flash (32 instruction
words) and store into data RAM as a data
“image”.
2.
Update the data image with the desired new
data.
3.
Erase program Flash row.
a)
Set up NVMCON register for multi-word,
program Flash, erase, and set WREN bit.
b)
Write address of row to be erased into
NVMADRU/NVMDR.
c)
Write 0x55 to NVMKEY.
d)
Write 0xAA to NVMKEY.
e)
Set the WR bit. This begins erase cycle.
f)
CPU stalls for the duration of the erase cycle.
g)
The WR bit is cleared when erase cycle
ends.
4.
Write 32 instruction words of data from data
RAM “image” into the program Flash write
latches.
5.
Program 32 instruction words into program
Flash.
a)
Set up NVMCON register for multi-word,
program Flash, program, and set WREN
bit.
b)
Write 0x55 to NVMKEY.
c)
Write 0xAA to NVMKEY.
d)
Set the WR bit. This begins program cycle.
e)
CPU stalls for duration of the program cycle.
f)
The WR bit is cleared by the hardware
when program cycle ends.
6.
Repeat steps 1 through 5 as needed to program
desired amount of program Flash memory.
5.6.2
ERASING A ROW OF PROGRAM
MEMORY
Example 5-1 shows a code sequence that can be used
to erase a row (32 instructions) of program memory.
EXAMPLE 5-1:
ERASING A ROW OF PROGRAM MEMORY
; Setup NVMCON for erase operation, multi word write
; program memory selected, and writes enabled
MOV
#0x4041,W0
;
MOV
W0,NVMCON
; Init NVMCON SFR
; Init pointer to row to be ERASED
MOV
#tblpage(PROG_ADDR),W0
;
MOV
W0,NVMADRU
; Initialize PM Page Boundary SFR
MOV
#tbloffset(PROG_ADDR),W0
; Intialize in-page EA[15:0] pointer
MOV
W0, NVMADR
; Initialize NVMADR SFR
DISI
#5
; Block all interrupts with priority <7 for
; next 5 instructions
MOV
#0x55,W0
MOV
W0,NVMKEY
; Write the 0x55 key
MOV
#0xAA,W1
;
MOV
W1,NVMKEY
; Write the 0xAA key
BSET
NVMCON,#WR
; Start the erase sequence
NOP
; Insert two NOPs after the erase
NOP
; command is asserted
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