
Symphony
TM
DSP56720 / DSP56721 Multi-Core Audio Processors, Rev.1
Freescale Semiconductor
2
Table of Contents
1
Pin Assignments. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4
1.1
Pinout for DSP56720 144-Pin Plastic LQFP Package . .4
1.2
Pinout for DSP56721 80-Pin Plastic LQFP Package . . .6
1.3
Pinout for DSP56721 144-Pin Plastic LQFP Package . .7
1.4
Pin Multiplexing. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .7
Electrical Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . .8
2.1
Chip-Level Conditions. . . . . . . . . . . . . . . . . . . . . . . . . . .8
2.1.1
Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . . .8
2.1.2
Thermal Characteristics. . . . . . . . . . . . . . . . . . .10
2.1.3
Power Requirements . . . . . . . . . . . . . . . . . . . . .10
2.1.4
DC Electrical Characteristics. . . . . . . . . . . . . . .11
2.1.5
AC Electrical Characteristics . . . . . . . . . . . . . . .12
2.1.6
Internal Clocks . . . . . . . . . . . . . . . . . . . . . . . . .12
2.1.7
External Clock Operation. . . . . . . . . . . . . . . . . .13
2.1.8
Reset, Stop, Mode Select, and Interrupt Timing14
2.2
Module-Level Specifications . . . . . . . . . . . . . . . . . . . . .17
2.2.1
Serial Host Interface (SHI) SPI Protocol Timing18
2.2.2
Serial Host Interface (SHI) I
2
C Protocol Timing.24
2
2.2.3
2.2.4
2.2.5
2.2.6
2.2.7
2.2.8
2.2.9
2.2.10 S/PDIF Timing . . . . . . . . . . . . . . . . . . . . . . . . . 42
2.2.11 EMC Timing (DSP56720 only). . . . . . . . . . . . . 43
Functional Description and Application Information . . . . . . . 48
Hardware Design Considerations . . . . . . . . . . . . . . . . . . . . . 48
Ordering Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48
Package Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48
6.1
80-Pin Package Outline Drawing. . . . . . . . . . . . . . . . . 48
6.2
144-Pin Package Outline Drawing. . . . . . . . . . . . . . . . 51
Product Documentation. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 53
Revision History . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 53
Programming the SHI I
2
C Serial Clock . . . . . . 26
Enhanced Serial Audio Interface (ESAI) Timing27
Timer Timing . . . . . . . . . . . . . . . . . . . . . . . . . . 32
GPIO Timing . . . . . . . . . . . . . . . . . . . . . . . . . . 32
JTAG Timing. . . . . . . . . . . . . . . . . . . . . . . . . . . 33
Watchdog Timer Timing . . . . . . . . . . . . . . . . . . 35
Host Data Interface (HDI24) Timing. . . . . . . . . 35
3
4
5
6
7
8