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參數(shù)資料
| 型號： | DSP56F826E |
| 廠商： | 飛思卡爾半導體(中國)有限公司 |
| 英文描述： | 16-bit Digital Signal Controllers |
| 中文描述： | 16位數(shù)字信號控制器 |
| 文件頁數(shù)： | 52/56頁 |
| 文件大?。?/td> | 700K |
| 代理商： | DSP56F826E |
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56F826 Technical Data, Rev. 14
52
Freescale Semiconductor
Use the value obtained by the equation (T
J
– T
T
)/P
D
, where T
T
is the temperature of the package case
determined by a thermocouple.
The thermal characterization parameter is measured per JESD51-2 specification using a 40-gauge type T
thermocouple epoxied to the top center of the package case. The thermocouple should be positioned so
that the thermocouple junction rests on the package. A small amount of epoxy is placed over the
thermocouple junction and over about 1mm of wire extending from the junction. The thermocouple wire
is placed flat against the package case to avoid measurement errors caused by cooling effects of the
thermocouple wire.
When heat sink is used, the junction temperature is determined from a thermocouple inserted at the
interface between the case of the package and the interface material. A clearance slot or hole is normally
required in the heat sink. Minimizing the size of the clearance is important to minimize the change in
thermal performance caused by removing part of the thermal interface to the heat sink. Because of the
experimental difficulties with this technique, many engineers measure the heat sink temperature and then
back-calculate the case temperature using a separate measurement of the thermal resistance of the
interface. From this case temperature, the junction temperature is determined from the junction-to-case
thermal resistance.
5.2 Electrical Design Considerations
Use the following list of considerations to assure correct operation:
Provide a low-impedance path from the board power supply to each V
DD,
V
DDIO,
and V
DDA
pin on the
controller, and from the board ground to each V
SS,
V
SSIO,
and V
SSA
(GND) pin.
The minimum bypass requirement is to place 0.1
μ
F capacitors positioned as close as possible to the package
supply pins. The recommended bypass configuration is to place one bypass capacitor on each of the
V
DD
/V
SS
pairs, including V
DDA
/V
SSA
and V
DDIO
/V
SSIO.
Ceramic and tantalum capacitors tend to provide
better performance tolerances.
Ensure that capacitor leads and associated printed circuit traces that connect to the chip V
DD,
V
DDIO,
and
V
DDA
and V
SS,
V
SSIO,
and V
SSA
(GND) pins are less than 0.5 inch per capacitor lead.
Bypass the V
DD
and V
SS
layers of the PCB with approximately 100
μ
F, preferably with a high-grade
capacitor such as a tantalum capacitor.
CAUTION
This device contains protective circuitry to guard
against damage due to high static voltage or
electrical fields. However, normal precautions are
advised to avoid application of any voltages higher
than maximum-rated voltages to this high-impedance
circuit. Reliability of operation is enhanced if unused
inputs are tied to an appropriate voltage level.
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| DSP56F826 | 16-bit Hybrid Controller(16位混合控制器) |
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| DSP56F827FG80 | 16-bit Digital Signal Controllers |
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| DSP56F826EVM | 功能描述:開發(fā)板和工具包 - 其他處理器 Evaluation Kit For DSP56F826 RoHS:否 制造商:Freescale Semiconductor 產(chǎn)品:Development Systems 工具用于評估:P3041 核心:e500mc 接口類型:I2C, SPI, USB 工作電源電壓: |
| DSP56F826EVMUM | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:56F826 Evaluation Module Hardware User＇s Manual |
| DSP56F826PB | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:56F826 16-Bit Hybrid Controller Product Brief |
| DSP56F826PBD | 制造商:MOTOROLA 制造商全稱:Motorola, Inc 功能描述:Preliminary Technical Data DSP56F826 16-bit Digital Signal Processor |
| DSP56F827 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:DSP56F827 16-bit Hybrid Controller |
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