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| 型號(hào)： | DSP56F826BU80E |
| 廠商： | 飛思卡爾半導(dǎo)體(中國)有限公司 |
| 英文描述： | 16-bit Digital Signal Controllers |
| 中文描述： | 16位數(shù)字信號(hào)控制器 |
| 文件頁數(shù)： | 24/56頁 |
| 文件大小： | 700K |
| 代理商： | DSP56F826BU80E |
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56F826 Technical Data, Rev. 14
24
Freescale Semiconductor
V
DD
should not be allowed to rise early (1). This is usually avoided by running the regulator for the V
DD
supply (2.5V) from the voltage generated by the 3.3V V
DDIO
supply, see
Figure 3-3
. This keeps V
DD
from
rising faster than V
DDIO
.
V
DD
should not rise so late that a large voltage difference is allowed between the two supplies (2).
Typically this situation is avoided by using external discrete diodes in series between supplies, as shown
in
Figure 3-3
. The series diodes forward bias when the difference between V
DDIO
and V
DD
reaches
approximately 1.4, causing V
DD
to rise as V
DDIO
ramps up. When the V
DD
regulator begins proper
operation, the difference between supplies will typically be 0.8V and conduction through the diode chain
reduces to essentially leakage current. During supply sequencing, the following general relationship
should be adhered to:
V
DDIO
> V
DD
> (V
DDIO
- 1.4V)
In practice, V
DDA
is typically connected directly to V
DDIO
with some filtering.
Figure 3-3 Example Circuit to Control Supply Sequencing
3.4 AC Electrical Characteristics
Timing waveforms in
Section 3.4
are tested using the V
IL
and V
IH
levels specified in the DC Characteristics
table. The levels of V
IH
and V
IL
for an input signal are shown in
Figure 3-4
.
Figure 3-4 Input Signal Measurement References
Figure 3-5
shows the definitions of the following signal states:
Active state, when a bus or signal is driven, and enters a low impedance state
Tri-stated, when a bus or signal is placed in a high impedance state
Data Valid state, when a signal level has reached V
OL
or V
OH
Data Invalid state, when a signal level is in transition between V
OL
and V
OH
3.3V
Regulator
2.5V
Regulator
Supply
V
DD
V
DDIO,
V
DDA
V
IH
V
IL
Fall Time
Input Signal
Note: The midpoint is V
IL
+ (V
IH
– V
IL
)/2.
Midpoint1
Low
High
Pulse Width
90%
50%
10%
Rise Time
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| DSP56F826BU80E | 制造商:Freescale Semiconductor 功能描述:Digital Signal Processor IC DSP Type:Cor |
| DSP56F826BU80E | 制造商:Freescale Semiconductor 功能描述:DSP LQFP100 3.6V |
| DSP56F826D | 制造商:MOTOROLA 制造商全稱:Motorola, Inc 功能描述:Preliminary Technical Data DSP56F826 16-bit Digital Signal Processor |
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| DSP56F826EVM | 功能描述:開發(fā)板和工具包 - 其他處理器 Evaluation Kit For DSP56F826 RoHS:否 制造商:Freescale Semiconductor 產(chǎn)品:Development Systems 工具用于評(píng)估:P3041 核心:e500mc 接口類型:I2C, SPI, USB 工作電源電壓: |
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