參數(shù)資料
型號(hào): DSP56F826BU80E
廠商: 飛思卡爾半導(dǎo)體(中國(guó))有限公司
英文描述: 16-bit Digital Signal Controllers
中文描述: 16位數(shù)字信號(hào)控制器
文件頁數(shù): 15/56頁
文件大?。?/td> 700K
代理商: DSP56F826BU80E
Signals and Package Information
56F826 Technical Data, Rev. 14
Freescale Semiconductor
15
SRCK
(GPIOC2)
53
Input/Output
Input/Output
SSI Serial Receive Clock (SRCK)—
This bidirectional pin provides the serial bit
rate clock for the Receive section of the SSI. The clock signal can be continuous
or gated and can be used by both the transmitter and receiver in synchronous
mode.
Port C GPIO—
This is a General Purpose I/O (GPIO) pin with the capability of
being individually programmed as input or output.
After reset, the default state is GPIO input.
STD
(GPIOC3)
54
Output
Input/Output
SSI Transmit Data (STD)—
This output pin transmits serial data from the SSI
Transmitter Shift Register.
Port C GPIO—
This is a General Purpose I/O (GPIO) pin with the capability of
being individually programmed as input or output.
After reset, the default state is GPIO input.
STFS
(GPIOC4)
55
Input
Input/Output
SSI Serial Transmit Frame Sync (STFS)—
This bidirectional pin is used by the
Transmit section of the SSI as frame sync I/O or flag I/O. The STFS can be used
by both the transmitter and receiver in synchronous mode. It is used to
synchronize data transfer and can be an input or output pin.
Port C GPIO—
This is a General Purpose I/O (GPIO) pin with the capability of
being individually programmed as input or output.
After reset, the default state is GPIO input.
STCK
(GPIOC5)
56
Input/ Output
Input/Output
SSI Serial Transmit Clock (STCK)—
This bidirectional pin provides the serial bit
rate clock for the transmit section of the SSI. The clock signal can be continuous
or gated. It can be used by both the transmitter and receiver in synchronous
mode.
Port C GPIO—
This is a General Purpose I/O (GPIO) pin with the capability of
being individually programmed as input or output.
After reset, the default state is GPIO input.
SCLK
(GPIOF4)
84
Input/Output
Input/Output
SPI Serial Clock
—In master mode, this pin serves as an output, clocking slaved
listeners. In slave mode, this pin serves as the data clock input.
Port F GPIO
—This General Purpose I/O (GPIO) pin can be individually
programmed as input or output.
After reset, the default state is SCLK.
MOSI
(GPIOF5)
85
Input/Output
Input/Output
SPI Master Out/Slave In (MOSI)
—This serial data pin is an output from a
master device and an input to a slave device. The master device places data on
the MOSI line a half-cycle before the clock edge that the slave device uses to
latch the data.
Port F GPIO
—This General Purpose I/O (GPIO) pin can be individually
programmed as input or output.
Table 2-1 56F826 Signal and Package Information for the 100 Pin LQFP (Continued)
Signal
Name
Pin No.
Type
Description
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
DSP56F826BU80E 制造商:Freescale Semiconductor 功能描述:Digital Signal Processor IC DSP Type:Cor
DSP56F826BU80E 制造商:Freescale Semiconductor 功能描述:DSP LQFP100 3.6V
DSP56F826D 制造商:MOTOROLA 制造商全稱:Motorola, Inc 功能描述:Preliminary Technical Data DSP56F826 16-bit Digital Signal Processor
DSP56F826E 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:16-bit Digital Signal Controllers
DSP56F826EVM 功能描述:開發(fā)板和工具包 - 其他處理器 Evaluation Kit For DSP56F826 RoHS:否 制造商:Freescale Semiconductor 產(chǎn)品:Development Systems 工具用于評(píng)估:P3041 核心:e500mc 接口類型:I2C, SPI, USB 工作電源電壓: