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參數(shù)資料
| 型號(hào)： | DSP56F803BU80E |
| 廠商： | Freescale Semiconductor |
| 文件頁(yè)數(shù)： | 15/52頁(yè) |
| 文件大?。?/td> | 0K |
| 描述： | IC DSP 80MHZ 64KB FLASH 100LQFP |
| 特色產(chǎn)品： | DSP56F803 Digital Signal Controller |
| 標(biāo)準(zhǔn)包裝： | 90 |
| 系列： | 56F8xx |
| 核心處理器： | 56800 |
| 芯體尺寸： | 16-位 |
| 速度： | 80MHz |
| 連通性： | CAN，EBI/EMI，SCI，SPI |
| 外圍設(shè)備： | POR，PWM，WDT |
| 輸入/輸出數(shù)： | 16 |
| 程序存儲(chǔ)器容量： | 71KB（35.5K x 16） |
| 程序存儲(chǔ)器類型： | 閃存 |
| RAM 容量： | 2.5K x 16 |
| 電壓 - 電源 (Vcc/Vdd)： | 3 V ~ 3.6 V |
| 數(shù)據(jù)轉(zhuǎn)換器： | A/D 8x12b |
| 振蕩器型： | 外部 |
| 工作溫度： | -40°C ~ 85°C |
| 封裝/外殼： | 100-LQFP |
| 包裝： | 托盤 |
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56F803 Technical Data, Rev. 16
22
Freescale Semiconductor
Figure 3-1 Maximum Run IDD vs. Frequency (see Note 6. in Table 3-14)
3.3 AC Electrical Characteristics
Timing waveforms in Section 3.3 are tested using the V
IL and VIH levels specified in the DC Characteristics
table. In Figure 3-2 the levels of V
IH and VIL for an input signal are shown.
8.
This low-voltage interrupt monitors the VDDA external power supply. VDDA is generally connected to the same potential
as VDD via separate traces. If VDDA drops below VEIO, an interrupt is generated. Functionality of the device is guaranteed
under transient conditions when VDDA>VEIO (between the minimum specified VDD and the point when the VEIO interrupt is
generated).
9.
This low voltage interrupt monitors the internally regulated core power supply. If the output from the internal voltage is
regulator drops below VEIC, an interrupt is generated. Since the core logic supply is internally regulated, this interrupt will not
be generated unless the external power supply drops below the minimum specified value (3.0V).
10. Power
–on reset occurs whenever the internally regulated 2.5V digital supply drops below 1.5V typical. While power is
ramping up, this signal remains active as long as the internal 2.5V is below 1.5V typical, no matter how long the ramp-up rate
is. The internally regulated voltage is typically 100mV less than VDD during ramp-up, until 2.5V is reached, at which time it
self-regulates.
0
30
90
120
180
60
20
40
60
80
Freq. (MHz)
IDD
(mA)
150
IDD Digital
IDD Analog
IDD Total
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| DSP56F803BU80E | 制造商:Freescale Semiconductor 功能描述:Digital Signal Processor IC DSP Type:Cor |
| DSP56F803BU80E | 制造商:Freescale Semiconductor 功能描述:DSP LQFP100 3.6V |
| DSP56F803E | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:16-bit Digital Signal Controllers |
| DSP56F803EVM | 功能描述:開發(fā)板和工具包 - 其他處理器 Evaluation Kit For DSP56F803 RoHS:否 制造商:Freescale Semiconductor 產(chǎn)品:Development Systems 工具用于評(píng)估:P3041 核心:e500mc 接口類型:I2C, SPI, USB 工作電源電壓: |
| DSP56F803EVMUM | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:56F803 Evaluation Module Hardware User＇s Manual |
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