參數(shù)資料
型號(hào): DSP56F802TA60E
廠商: Freescale Semiconductor
文件頁(yè)數(shù): 3/40頁(yè)
文件大?。?/td> 0K
描述: IC DSP 60MHZ 16KB FLASH 32-LQFP
標(biāo)準(zhǔn)包裝: 250
系列: 56F8xx
核心處理器: 56800
芯體尺寸: 16-位
速度: 60MHz
連通性: SCI
外圍設(shè)備: POR,PWM,WDT
輸入/輸出數(shù): 8
程序存儲(chǔ)器容量: 20KB(10K x 16)
程序存儲(chǔ)器類型: 閃存
RAM 容量: 2K x 16
電壓 - 電源 (Vcc/Vdd): 3 V ~ 3.6 V
數(shù)據(jù)轉(zhuǎn)換器: A/D 5x12b
振蕩器型: 內(nèi)部
工作溫度: -40°C ~ 85°C
封裝/外殼: 32-LQFP
包裝: 托盤
Interrupt and Program Control Signals
56F802 Technical Data, Rev. 9
Freescale Semiconductor
11
2.3 Interrupt and Program Control Signals
2.4 Pulse Width Modulator (PWM) Signals
2.5 Serial Communications Interface (SCI) Signals
Table 2-5 Program Control Signals
No. of
Pins
Signal
Name
Signal
Type
State During
Reset
Signal Description
1
RESET
Input
(Schmitt)
Input
Reset—This input is a direct hardware reset on the processor. When
RESET is asserted low, the controller is initialized and placed in the
Reset state. A Schmitt trigger input is used for noise immunity. When the
RESET pin is deasserted, the initial chip operating mode is latched from
the EXTBOOT pin. The internal reset signal will be deasserted
synchronous with the internal clocks, after a fixed number of internal
clocks.
To ensure complete hardware reset, RESET and TRST should be
asserted together. The only exception occurs in a debugging
environment when a hardware device reset is required and it is
necessary not to reset the OnCE/JTAG module. In this case, assert
RESET, but do not assert TRST.
Table 2-6 Pulse Width Modulator (PWMA) Signals
No. of
Pins
Signal
Name
Signal
Type
State During
Reset
Signal Description
6
PWMA0-5
Output
Tri-stated
PWMA0-5— These are six PWMA output pins.
1
FAULTA0
Input
(Schmitt)
Input
FAULTA0 —This fault input is used for disabling selected PWMA
outputs in cases where fault conditions originate off-chip.
Table 2-7 Serial Communications Interface (SCI0) Signals
No. of
Pins
Signal
Name
Signal
Type
State During
Reset
Signal Description
1
TXD0
GPIOB0
Output
Input/Ou
tput
Input
Transmit Data (TXD0)—SCI0 transmit data output
Port B GPIO—This pin is a General Purpose I/O (GPIO) pin that can
be individually programmed as an input or output pin.
After reset, the default state is SCI output.
相關(guān)PDF資料
PDF描述
MCF52213CAE50 IC MCU 32BIT 128K FLASH 64-LQFP
MC9S08GT60ACFDE IC MCU 60K FLASH 4K RAM 48-QFN
DS89C430-ENG IC MCU FLASH 16KB 25MHZ 44-TQFP
1061541535 ADPT OPT SINGLMODE LC/APC-LC/APC
1061541530 ADPT OPT SINGLEMODE LC-LC BLUE
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
DSP56F802TA80 制造商:Rochester Electronics LLC 功能描述:- Bulk 制造商:Motorola Inc 功能描述: 制造商:MOTOROLA 功能描述:
DSP56F802TA80E 功能描述:數(shù)字信號(hào)處理器和控制器 - DSP, DSC 16 BIT HYBRID CONTROLLER RoHS:否 制造商:Microchip Technology 核心:dsPIC 數(shù)據(jù)總線寬度:16 bit 程序存儲(chǔ)器大小:16 KB 數(shù)據(jù) RAM 大小:2 KB 最大時(shí)鐘頻率:40 MHz 可編程輸入/輸出端數(shù)量:35 定時(shí)器數(shù)量:3 設(shè)備每秒兆指令數(shù):50 MIPs 工作電源電壓:3.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TQFP-44 安裝風(fēng)格:SMD/SMT
DSP56F803 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:Digital Switched-Mode Power Supply (SMPS)
DSP56F803BU80 功能描述:數(shù)字信號(hào)處理器和控制器 - DSP, DSC 80Mhz/ 40MIPS RoHS:否 制造商:Microchip Technology 核心:dsPIC 數(shù)據(jù)總線寬度:16 bit 程序存儲(chǔ)器大小:16 KB 數(shù)據(jù) RAM 大小:2 KB 最大時(shí)鐘頻率:40 MHz 可編程輸入/輸出端數(shù)量:35 定時(shí)器數(shù)量:3 設(shè)備每秒兆指令數(shù):50 MIPs 工作電源電壓:3.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TQFP-44 安裝風(fēng)格:SMD/SMT
DSP56F803BU80E 功能描述:數(shù)字信號(hào)處理器和控制器 - DSP, DSC 80Mhz/40 MIPS RoHS:否 制造商:Microchip Technology 核心:dsPIC 數(shù)據(jù)總線寬度:16 bit 程序存儲(chǔ)器大小:16 KB 數(shù)據(jù) RAM 大小:2 KB 最大時(shí)鐘頻率:40 MHz 可編程輸入/輸出端數(shù)量:35 定時(shí)器數(shù)量:3 設(shè)備每秒兆指令數(shù):50 MIPs 工作電源電壓:3.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TQFP-44 安裝風(fēng)格:SMD/SMT