參數(shù)資料
型號(hào)： DSD1793DB
元件分類： DAC
英文描述： 24 BIT 192 KHZ SAMPLING ADVANCED SEGMENT AUDIO STEREO DIGITAL TO ANALOG CONVERTER
中文描述： 24位192千赫采樣高級(jí)分段音頻立體聲數(shù)模轉(zhuǎn)換器
文件頁(yè)數(shù)： 21/47頁(yè)
文件大小： 428K
代理商： DSD1793DB
DSD1793
SLES075A MARCH 2003 REVISED JANUARY 2004
www.ti.com
28
OPE: DAC Operation Control
This bit is available for read and write.
Default value: 0
OPE = 0
DAC operation enabled (default)
OPE = 1
DAC operation disabled
The OPE bit enables or disables the analog output for both channels. Disabling the analog outputs forces them to
the bipolar zero level (BPZ) even if digital audio data is present on the input.
DFMS: Stereo DF Bypass Mode Select
This bit is available for read and write.
Default value: 0
DFMS = 0
Monaural (default)
DFMS = 1
Stereo input enabled
The DFMS bit enables stereo operation in the DF bypass mode. In the DF bypass mode, when DFMS is set to 0,
the pin for the input data is PDATA (pin 3) only, therefore the DSD1793 operates as a monaural DAC. When DFMS
is set to 1, the DSD1793 can operate as a stereo DAC with inputs of L-channel and R-channel data on DSDL (pin
25) and DSDR (pin 24), respectively.
FLT: Digital Filter Rolloff Control
This bit is available for read and write.
Default value: 0
FLT = 0
Sharp rolloff (default)
FLT = 1
Slow rolloff
The FLT bit selects the digital filter rolloff characteristic. The filter responses for these selections are shown in the
TYPICAL PERFORMANCE CURVES section of this data sheet.
INZD: Infinite Zero Detect Mute Control
This bit is available for read and write.
Default value: 0
INZD = 0
Infinite zero detect mute disabled (default)
INZD = 1
Infinite zero detect mute enabled
The INZD bit enables or disables the zero detect mute function. Setting INZD to 1 forces muted analog outputs to
hold a bipolar zero level when the DSD1793 detects zero condition in both channels. The infinite zero detect mute
function is not available in the DSD mode.
B15
B14
B13
B12
B11
B10
B9
B8
B7
B6
B5
B4
B3
B2
B1
B0
Register 20
R/W
0
1
0
1
0
RSV
SRST
DSD
DFTH
MONO
CHSL
OS1
OS0
R/W: Read/Write Mode Select
When R/W = 0, a write operation is performed.
When R/W = 1, a read operation is performed.
Default value: 0
相關(guān)PDF資料
PDF描述
DSD1793DBR 24 BIT 192 KHZ SAMPLING ADVANCED SEGMENT AUDIO STEREO DIGITAL TO ANALOG CONVERTER
DSKW3022 DC-DC REG PWR SUPPLY MODULE
DSS-2612-330R 1 ELEMENT, 33 uH, GENERAL PURPOSE INDUCTOR, SMD
DSS9NC51H223Q55J 1 FUNCTIONS, 50 V, 6 A, DATA LINE FILTER
DSS9NC52A101Q55J 1 FUNCTIONS, 100 V, 6 A, DATA LINE FILTER
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
DSD1793DBG4 功能描述:音頻數(shù)/模轉(zhuǎn)換器 IC 24B 192kHz Sampl Adv Segment Aud St DAC RoHS:否 制造商:Texas Instruments 轉(zhuǎn)換器數(shù)量: 分辨率:16 bit 接口類型:I2S, UBS 轉(zhuǎn)換速率: 信噪比:98 dB 工作電源電壓:5 V DAC 輸出端數(shù)量:2 工作溫度范圍:- 25 C to + 85 C 電源電流:23 mA 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:TQFP-32 封裝:Reel
DSD1793DBR 功能描述:音頻數(shù)/模轉(zhuǎn)換器 IC 24-Bit 192kHz Smplng Adv Stg Stereo DAC RoHS:否 制造商:Texas Instruments 轉(zhuǎn)換器數(shù)量: 分辨率:16 bit 接口類型:I2S, UBS 轉(zhuǎn)換速率: 信噪比:98 dB 工作電源電壓:5 V DAC 輸出端數(shù)量:2 工作溫度范圍:- 25 C to + 85 C 電源電流:23 mA 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:TQFP-32 封裝:Reel
DSD1793DBRG4 功能描述:音頻數(shù)/模轉(zhuǎn)換器 IC 24-Bit 192kHz Smplng Adv Stg Stereo DAC RoHS:否 制造商:Texas Instruments 轉(zhuǎn)換器數(shù)量: 分辨率:16 bit 接口類型:I2S, UBS 轉(zhuǎn)換速率: 信噪比:98 dB 工作電源電壓:5 V DAC 輸出端數(shù)量:2 工作溫度范圍:- 25 C to + 85 C 電源電流:23 mA 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:TQFP-32 封裝:Reel
DSD1794 制造商:TI 制造商全稱:Texas Instruments 功能描述:24-BIT, 192-kHz SAMPLING, ADVANCED SEGMENT, AUDIO STRRO DIGITAL-TO-ALALOG CONVERTER
DSD1794A 制造商:TI 制造商全稱:Texas Instruments 功能描述:24-BIT,192-kHz SAMPLING, ADVANCED SEGMENT, AUDIO STEREO DIGITAL-TO-ANALOG CONVERTER
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。

采購(gòu)需求

(若只采購(gòu)一條型號(hào)，填寫一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

*型號(hào) *數(shù)量 廠商 批號(hào) 封裝
添加更多采購(gòu)

我的聯(lián)系方式

*
*
*