參數(shù)資料
型號: DSD1792DBG4
廠商: Texas Instruments
文件頁數(shù): 33/57頁
文件大小: 0K
描述: IC 24BIT STEREO AUD DAC 28-SSOP
產(chǎn)品培訓(xùn)模塊: Data Converter Basics
標(biāo)準包裝: 47
位數(shù): 24
數(shù)據(jù)接口: 串行
轉(zhuǎn)換器數(shù)目: 2
電壓電源: 模擬和數(shù)字
功率耗散(最大): 335mW
工作溫度: -25°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 28-SSOP(0.209",5.30mm 寬)
供應(yīng)商設(shè)備封裝: 28-SSOP
包裝: 管件
輸出數(shù)目和類型: 4 電流,單極
采樣率(每秒): 200k
DSD1792
SLES067B MARCH 2003 REVISED NOVEMBER 2006
www.ti.com
39
ANALOG FIR FILTER PERFORMANCE IN DSD MODE
Figure 43. DSD Filter-1, Low BW
f – Frequency – kHz
6
5
4
3
2
1
0
50
100
150
200
Gain
dB
GAIN
vs
FREQUENCY
Figure 44. DSD Filter-1, High BW
f – Frequency – kHz
60
50
40
30
20
10
0
500
1000
1500
Gain
dB
GAIN
vs
FREQUENCY
fc = 185 kHz
Gain(1) = –6.6 dB
Figure 45. DSD Filter-2, Low BW
f – Frequency – kHz
6
5
4
3
2
1
0
50
100
150
200
Gain
dB
GAIN
vs
FREQUENCY
Figure 46. DSD Filter-2, High BW
f – Frequency – kHz
60
50
40
30
20
10
0
500
1000
1500
Gain
dB
GAIN
vs
FREQUENCY
fc = 77 kHz
Gain(1) = –6 dB
(1) This gain is in comparison to PCM 0 dB, when the DSD input signal efficiency is 50%.
All specifications at DBCK = 2.8224 MHz (44.1 kHz
× 64 fS), and 50% modulation DSD data input, unless otherwise noted.
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