參數(shù)資料
型號(hào)： DSD1792DB
元件分類： DAC
英文描述： 24 bit 192 khz SAMPLING ADVANCED SEGMENT AUDIO STEREO DIGITAL TO ANALOG CONVERTER
中文描述： 24位192千赫采樣高級(jí)分段音頻立體聲數(shù)模轉(zhuǎn)換器
文件頁數(shù)： 47/56頁
文件大?。?/td> 497K
代理商： DSD1792DB
SLES067A MARCH 2003 REVISED AUGUST 2003
www.ti.com
47
Audio Fields
The audio field is 32 bits in length and the audio data is transferred MSB first, so the other fields must be stuffed with 0s
as shown in the following example.
31 16 12 8
7 4 3 0
audio data
MSB 24 bits LSB
All 0s
TDMCA Register Requirements
TDMCA mode requires device ID and audio channel information, previously described. The OPE bit in register 19 indicates
audio channel availability and register 23 indicates the device ID. Register 23 is used only in the TDMCA mode. See the
mode control register map (Table 3).
Register Write/Read Operation
The command supports register write and read operations. If the command requests to read one register, the read data
is transferred on DO during the data phase of the timing cycle. The DI signal can be retrieved at the positive edge of BCK,
and the DO signal is driven at the negative edge of BCK. DO is activated one BCK cycle early to compensate for the output
delay caused by high impedance. Figure 57 shows the TDMCA write and read timing.
BCK
DI
DO
DOEN
(Internal)
1 BCK Early
Read Mode and Proper Register ID
Write Data Retrieved, if Write Mode
Read Data Driven, if Read Mode
Register ID Phase
Data Phase
Figure 57. TDMCA Write and Read Operation Timing
TDMCA-Mode Operation
DCO specifies the owner of the next audio channel in TDMCA-mode operation. When a device retrieves its own audio
channel data, DCO goes HIGH during the last audio channel period. Figure 58 shows the DCO output timing in
TDMCA-mode operation. The host controller ignores the behavior of DCI and DCO. DCO indicates the last audio channel
of each device. Therefore, DCI means the next audio channel is allocated.
If some devices are skipped due to no active audio channel, the skipped devices must notify the next device that the DCO
will be passed through the next DCI. Figure 59 and Figure 60 show DCO timing with skip operation. Figure 61 shows the
ac timing of the daisy chain signals.
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
DSD1792DBG4 功能描述:音頻數(shù)/模轉(zhuǎn)換器 IC 24-Bit 192kHz Smplng Adv Stg Stereo DAC RoHS:否 制造商:Texas Instruments 轉(zhuǎn)換器數(shù)量: 分辨率:16 bit 接口類型:I2S, UBS 轉(zhuǎn)換速率: 信噪比:98 dB 工作電源電壓:5 V DAC 輸出端數(shù)量:2 工作溫度范圍:- 25 C to + 85 C 電源電流:23 mA 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:TQFP-32 封裝:Reel
DSD1792DBR 功能描述:音頻數(shù)/模轉(zhuǎn)換器 IC 24-Bit 192kHz Smplng Adv Stg Stereo DAC RoHS:否 制造商:Texas Instruments 轉(zhuǎn)換器數(shù)量: 分辨率:16 bit 接口類型:I2S, UBS 轉(zhuǎn)換速率: 信噪比:98 dB 工作電源電壓:5 V DAC 輸出端數(shù)量:2 工作溫度范圍:- 25 C to + 85 C 電源電流:23 mA 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:TQFP-32 封裝:Reel
DSD1792DBRG4 功能描述:音頻數(shù)/模轉(zhuǎn)換器 IC 24B 192kHz Sampl Adv Segment Aud St DAC RoHS:否 制造商:Texas Instruments 轉(zhuǎn)換器數(shù)量: 分辨率:16 bit 接口類型:I2S, UBS 轉(zhuǎn)換速率: 信噪比:98 dB 工作電源電壓:5 V DAC 輸出端數(shù)量:2 工作溫度范圍:- 25 C to + 85 C 電源電流:23 mA 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:TQFP-32 封裝:Reel
DSD1793 制造商:BB 制造商全稱:BB 功能描述:24 BIT 192 KHZ SAMPLING ADVANCED SEGMENT AUDIO STEREO DIGITAL TO ANALOG CONVERTER
DSD1793DB 功能描述:音頻數(shù)/模轉(zhuǎn)換器 IC 24-Bit 192kHz Smplng Adv Stg Stereo DAC RoHS:否 制造商:Texas Instruments 轉(zhuǎn)換器數(shù)量: 分辨率:16 bit 接口類型:I2S, UBS 轉(zhuǎn)換速率: 信噪比:98 dB 工作電源電壓:5 V DAC 輸出端數(shù)量:2 工作溫度范圍:- 25 C to + 85 C 電源電流:23 mA 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:TQFP-32 封裝:Reel
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