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參數(shù)資料
| 型號： | DSD1792DB |
| 元件分類： | DAC |
| 英文描述： | 24 bit 192 khz SAMPLING ADVANCED SEGMENT AUDIO STEREO DIGITAL TO ANALOG CONVERTER |
| 中文描述： | 24位192千赫采樣高級分段音頻立體聲數(shù)模轉(zhuǎn)換器 |
| 文件頁數(shù)： | 23/56頁 |
| 文件大?。?/td> | 497K |
| 代理商： | DSD1792DB |
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SLES067A MARCH 2003 REVISED AUGUST 2003
www.ti.com
23
B15
B14
B13
B12
B11
B10
B9
B8
B7
B6
B5
B4
B3
B2
B1
B0
Register 18
R/W
0
0
1
0
0
1
0
ATLD
FMT2
FMT1
FMT0
DMF1
DMF0
DME
MUTE
R/W: Read/Write Mode Select
When R/W = 0, a write operation is performed.
When R/W = 1, a read operation is performed.
Default value: 0
ATLD: Attenuation Load Control
This bit is available for read and write.
Default value: 0
ATLD = 0
ATLD = 1
Attenuation control disabled (default)
Attenuation control enabled
The ATLD bit is used to enable loading of the attenuation data contained in registers 16 and 17. When ATLD = 0, the
attenuation settings remain at the previously programmed levels, ignoring new data loaded from registers 16 and 17. When
ATLD = 1, attenuation data written to registers 16 and 17 is loaded normally.
FMT[2:0]: Audio Interface Data Format
These bits are available for read and write.
Default value: 101
For the external digital filter interface mode (DFTH mode), this register is operated as shown in the
Application for
Interfacing With an External Digital Filter
section of this data sheet.
FMT[2:0]
000
001
010
011
100
101
110
111
Audio Data Format Selection
16-bit standard format, right-justified data
20-bit standard format, right-justified data
24-bit standard format, right-justified data
24-bit MSB-first, left-justified data
16-bit I
2
S-format data
24-bit I
2
S-format data (default)
Reserved
Reserved
The FMT[2:0] bits are used to select the data format for the serial audio interface.
DMF[1:0]: Sampling Frequency Selection for the De-Emphasis Function
These bits are available for read and write.
Default value: 00
DMF[1:0]
00
01
10
11
De-Emphasis Sampling Frequency Selection
Disabled (default)
48 kHz
44.1 kHz
32 kHz
The DMF[1:0] bits are used to select the sampling frequency used by the digital de-emphasis function when it is enabled
by setting the DME bit. The de-emphasis curves are shown in the
TYPICAL PERFORMANCE CURVES
section of this
data sheet.
For the DSD mode, analog FIR filter performance can be selected using this register. Filter response plots are shown in
the
TYPICAL PERFORMANCE CURVES
section of this data sheet. A register map is shown in the
Configuration for the
DSD Interface Mode
section of this data sheet.
相關(guān)PDF資料 |
PDF描述 |
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| DSD1792DBR | 24 bit 192 khz SAMPLING ADVANCED SEGMENT AUDIO STEREO DIGITAL TO ANALOG CONVERTER |
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| DSD1792DBG4 | 功能描述:音頻數(shù)/模轉(zhuǎn)換器 IC 24-Bit 192kHz Smplng Adv Stg Stereo DAC RoHS:否 制造商:Texas Instruments 轉(zhuǎn)換器數(shù)量: 分辨率:16 bit 接口類型:I2S, UBS 轉(zhuǎn)換速率: 信噪比:98 dB 工作電源電壓:5 V DAC 輸出端數(shù)量:2 工作溫度范圍:- 25 C to + 85 C 電源電流:23 mA 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:TQFP-32 封裝:Reel |
| DSD1792DBR | 功能描述:音頻數(shù)/模轉(zhuǎn)換器 IC 24-Bit 192kHz Smplng Adv Stg Stereo DAC RoHS:否 制造商:Texas Instruments 轉(zhuǎn)換器數(shù)量: 分辨率:16 bit 接口類型:I2S, UBS 轉(zhuǎn)換速率: 信噪比:98 dB 工作電源電壓:5 V DAC 輸出端數(shù)量:2 工作溫度范圍:- 25 C to + 85 C 電源電流:23 mA 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:TQFP-32 封裝:Reel |
| DSD1792DBRG4 | 功能描述:音頻數(shù)/模轉(zhuǎn)換器 IC 24B 192kHz Sampl Adv Segment Aud St DAC RoHS:否 制造商:Texas Instruments 轉(zhuǎn)換器數(shù)量: 分辨率:16 bit 接口類型:I2S, UBS 轉(zhuǎn)換速率: 信噪比:98 dB 工作電源電壓:5 V DAC 輸出端數(shù)量:2 工作溫度范圍:- 25 C to + 85 C 電源電流:23 mA 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:TQFP-32 封裝:Reel |
| DSD1793 | 制造商:BB 制造商全稱:BB 功能描述:24 BIT 192 KHZ SAMPLING ADVANCED SEGMENT AUDIO STEREO DIGITAL TO ANALOG CONVERTER |
| DSD1793DB | 功能描述:音頻數(shù)/模轉(zhuǎn)換器 IC 24-Bit 192kHz Smplng Adv Stg Stereo DAC RoHS:否 制造商:Texas Instruments 轉(zhuǎn)換器數(shù)量: 分辨率:16 bit 接口類型:I2S, UBS 轉(zhuǎn)換速率: 信噪比:98 dB 工作電源電壓:5 V DAC 輸出端數(shù)量:2 工作溫度范圍:- 25 C to + 85 C 電源電流:23 mA 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:TQFP-32 封裝:Reel |
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