
DSD1608
SLES040
–
JUNE 2002
www.ti.com
2
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all ntegrated circuits be handled with appropriate
precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more susceptible to
damage because very small parametric changes could cause the device not to meet its published specifications.
ORDERING INFORMATION
PRODUCT
PACKAGE
PACKAGE
DESIGNATOR
OPERATION
TEMPERATURE
RANGE
PACKAGE
MARKING
ORDERING
NUMBER
TRANSPORT
MEDIA
DSD1608PAH
52 l
52-lead TQFP
dTQFP
PAH
C t 85
–
25
°
C to 85
°
C
DSD1608
DSD1608PAH
Tube
DSD1608PAHR
Tape and reel
ABSOLUTE MAXIMUM RATINGS
over operating free-air temperature range unless otherwise noted(1)
DSD1608
6.5 V
4 V
±
0.1 V
±
0.1 V
–
0.3 V to 6.5 V
–
0.3 V to (VDD + 0.3 V)
–
0.3 V to (VCC + 0.3 V)
±
10 mA
–
40
°
C to 85
°
C
–
55
°
C to 150
°
C
150
°
C
260
°
C, 5 s
235
°
C, 10 s
Supplyvoltage
Supply voltage
VCC1
–
VCC7
VDD1, VDD2
Supply voltage differences: VCC1
–
VCC7, VDD1, VDD2
Ground voltage differences: AGND1
–
6, DGND1, DGND2
Digital input voltage: PLRCK, PBCK, PDATA1
–
PDATA4, DSD1
–
DSD8, DBCK, DSCK, PSCK, RST
Digital input voltage: MC, MS, MDI, ZERO1, ZERO2, ZERO38, MDO
Analog input voltage
Input current (any pins except supplies)
Operating emperature
Storage emperature
Junction emperature
Lead temperature (soldering)
Package temperature (IR reflow, peak)
(1)Stresses beyond those isted under
“
absolute maximum ratings
”
may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under
“
recommended operating conditions
”
is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
ELECTRICAL CHARACTERISTICS
at TA = 25
°
C, VDD = 3.3 V, VCC = 5 V; in PCM mode, fS = 44.1 kHz, system clock = 256 fS, 24-bit data; in DSD mode, fS = 2.8224 MHz
(= 64
×
44.1 kHz), system clock = 256
×
44.1 kHz, 1-bit data (unless otherwise noted)
PARAMETER
Resolution
DATA FORMAT (PCM MODE)
Audio data interface format
Audio data bit length
Audio data format
fS
Sampling requency
fS = 44.1 kHz
TEST CONDITIONS
MIN
TYP
24
MAX
UNIT
Bits
Standard, I2S, left justified
16-, 18-, 20-, 24-bit selectable
MSB first, 2s complement
10
128 fS, 192 fS, 256 fS, 384 fS,
512 fS, 768 fS
200
kHz
System clock frequency
DATA FORMAT (DSD MODE)
Audio data interface format
Audio data bit length
fS
Sampling requency
System clock frequency
(1)Pins 50, 51, 34, 33, 37, 38
–
45, 46
–
49: PBCK, PLRCK, DSCK, PSCK, DBCK, DSD1
–
DSD8, PDATA1
–
PDATA4.
(2)Pins 2, 3, 4, 36: MDI, MS, MC, RST.
(3)Pins 5
–
8: MDO, ZERO1, ZERO2, ZERO38.
(4)Analog performance specs are measured in the averaging mode using the System Two audio measurement system by Audio Precision .
(5)These specs are measured under the condition that the OVR1, OVR0 n mode registers are set to (0,1). (The oversampling rate of the modulator
is 64 fS.) If the OVR1, OVR0 are (0,0) (32 fS oversampling: default), the specs are the same as at fS = 96 kHz.
Direct stream digital (DSD)
1 bit
64 fS
256 fS, 384 fS, 512 fS, 768 fS
fS = 44.1 kHz
fS = 44.1 kHz
Hz
kHz