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參數(shù)資料
型號: DS89C440-QNG
廠商: Maxim Integrated Products
文件頁數(shù): 4/46頁
文件大?。?/td> 0K
描述: IC MCU FLASH 32KB 25MHZ 44-PLCC
標(biāo)準(zhǔn)包裝: 26
系列: 89C
核心處理器: 8051
芯體尺寸: 8-位
速度: 25MHz
連通性: EBI/EMI,SIO,UART/USART
外圍設(shè)備: 電源故障復(fù)位,WDT
輸入/輸出數(shù): 32
程序存儲(chǔ)器容量: 32KB(32K x 8)
程序存儲(chǔ)器類型: 閃存
RAM 容量: 1K x 8
電壓 - 電源 (Vcc/Vdd): 4.5 V ~ 5.5 V
振蕩器型: 外部
工作溫度: -40°C ~ 85°C
封裝/外殼: 44-LCC(J 形引線)
包裝: 管件
DS89C430/DS89C450 Ultra-High-Speed Flash Microcontrollers
12 of 46
PIN DESCRIPTION
PIN
PDIP
PLCC
TQFP
NAME
FUNCTION
40
12, 44
6, 38
VCC
+5V
20
1, 22, 23,
34
16, 17, 28,
39
GND
Logic Ground
9
10
4
RST
External Reset. The RST input pin is bidirectional and contains a Schmitt Trigger to
recognize external active-high reset inputs. The pin also employs an internal pulldown
resistor to allow for a combination of wire-ORed external reset sources. An RC is not
required for power-up, as the device provides this function internally.
19
21
15
XTAL1
18
20
14
XTAL2
Crystal Oscillators. These pins provide support for fundamental-mode parallel-resonant
AT-cut crystals. XTAL1 also acts as an input if there is an external clock source in place of
a crystal. XTAL2 serves as the output of the crystal amplifier.
29
32
26
PSEN
Program Store Enable. This signal is commonly connected to optional external program
memory as a chip enable. PSEN provides an active-low pulse and is driven high when
external program memory is not being accessed. In one-cycle page mode 1, PSEN
remains low for consecutive page hits.
30
33
27
ALE/PROG
Address Latch Enable. This signal functions as a clock to latch the external address LSB
from the multiplexed address/data bus on Port 0. This signal is commonly connected to the
width of 1.5 XTAL1 cycles and a period of four XTAL1 cycles. In page mode, the ALE
pulse width is altered according to the page mode selection. In traditional 8051 mode, ALE
is high when using the EMI reduction mode and during a reset condition. ALE can be
enabled by writing ALEON = 1 (PMR.2). Note that ALE operates independently of ALEON
during external memory accesses. As an alternate mode, this pin (PROG) is used to
execute the parallel program function.
39
43
37
P0.0 (AD0)
38
42
36
P0.1 (AD1)
37
41
35
P0.2 (AD2)
36
40
34
P0.3 (AD3)
35
39
33
P0.4 (AD4)
34
38
32
P0.5 (AD5)
33
37
31
P0.6 (AD6)
32
36
30
P0.7 (AD7)
Port 0 (AD0–AD7), I/O. Port 0 is an open-drain, 8-bit, bidirectional I/O port. As an
alternate function, Port 0 can function as the multiplexed address/data bus to access off-
chip memory. During the time when ALE is high, the LSB of a memory address is
presented. When ALE falls to logic 0, the port transitions to a bidirectional data bus. This
bus is used to read external program memory and read/write external RAM or peripherals.
When used as a memory bus, the port provides weak pullups for logic 1 outputs. The reset
condition of port 0 is tri-state. Pullup resistors are required only when using port 0 as an
I/O port.
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DS89C440-QNL 功能描述:IC MCU FLASH 32KB 33MHZ 44-PLCC RoHS:否 類別:集成電路 (IC) >> 嵌入式 - 微控制器, 系列:89C 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:260 系列:73S12xx 核心處理器:80515 芯體尺寸:8-位 速度:24MHz 連通性:I²C,智能卡,UART/USART,USB 外圍設(shè)備:LED,POR,WDT 輸入/輸出數(shù):9 程序存儲(chǔ)器容量:64KB(64K x 8) 程序存儲(chǔ)器類型:閃存 EEPROM 大小:- RAM 容量:2K x 8 電壓 - 電源 (Vcc/Vdd):2.7 V ~ 5.5 V 數(shù)據(jù)轉(zhuǎn)換器:- 振蕩器型:內(nèi)部 工作溫度:-40°C ~ 85°C 封裝/外殼:68-VFQFN 裸露焊盤 包裝:管件
DS89C440-QNL+ 制造商:DALLAS 制造商全稱:Dallas Semiconductor 功能描述:Ultra-High-Speed Flash Microcontrollers
DS89C440-XXX 制造商:DALLAS 制造商全稱:Dallas Semiconductor 功能描述:Ultra-High-Speed Flash Microcontrollers
DS89C450 制造商:DALLAS 制造商全稱:Dallas Semiconductor 功能描述:Ultra-High-Speed Flash Microcontrollers
DS89C450+ENG 制造商:Maxim Integrated Products 功能描述:MCU 8BIT CISC 64KB FLASH 5V 44TQFP - Trays