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參數(shù)資料
| 型號(hào)： | DS87C520-WCL |
| 英文描述： | EPROM/ROM High-Speed Micro |
| 中文描述： | 存儲(chǔ)器/ ROM的高速微 |
| 文件頁數(shù)： | 18/45頁 |
| 文件大?。?/td> | 1415K |
| 代理商： | DS87C520-WCL |
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DS87C520/DS83C520 EPROM/ROM High-Speed Microcontrollers
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Table 6. PMM Control and Status Bit Summary
BIT
LOCATION
FUNCTION
RESET
WRITE ACCESS
0 to 1 only when
XTUP = 1 and
XTOFF = 0
XT/
RG
EXIF.3
Control. XT/
RG
= 1, runs from crystal or external
clock; XT/
RG
= 0, runs from internal ring oscillator.
X
RGMD
EXIF.2
Status. RGMD = 1, CPU clock = ring; RGMD = 0,
CPU clock = crystal.
0
None
CD1, CD0
PMR.7,
PMR.6
Control. CD1, 0 = 01, 4 clocks; CS1, 0 = 10, PMM1;
CD1, 0 = 11, PMM2.
0, 1
Write CD1, 0 = 10
or 11 only from
CD1, 0 = 01
SWB
PMR.5
Control. SWB = 1, hardware invokes switchback to 4
clocks, SWB = 0, no hardware switchback.
Control. Disables crystal operation after ring is
selected.
Status. 1 indicates a power-fail interrupt in service
.
Status. 1 indicates high priority interrupt in service.
Status. 1 indicates low priority interrupt in service.
Status. 1 indicates that the crystal has stabilized.
Status. Serial transmission on serial port 1.
Status. Serial word reception on serial port 1.
Status. Serial transmission on serial port 0.
Status. Serial word reception on serial port 0.
0
Unrestricted
XTOFF
PMR.3
0
1 only when
XT/
RG
= 0
None
None
None
None
None
None
None
None
PIP
HIP
LIP
XTUP
SPTA1
SPRA1
SPTA0
SPRA0
STATUS.7
STATUS.6
STATUS.5
STATUS.4
STATUS.3
STATUS.2
STATUS.1
STATUS.0
0
0
0
1
0
0
0
0
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