DS75LX: Digital Thermometer and Thermostat with Extended Addressing
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Shutdown Mode
For power-sensitive applications, the DS75LX offers a low-power shutdown mode. The SD bit in the configuration
register controls shutdown mode. When SD is changed to 1, the conversion in progress is completed and the result
is stored in the temperature register after which the DS75LX goes into a low-power standby state. The O.S. output
is cleared if the thermostat is operating in interrupt mode, and O.S remains unchanged in comparator mode. The 2-
wire interface remains operational in shutdown mode, and writing a 0 to the SD bit returns the DS75LX to normal
operation.
OPERATIONTHERMOSTAT
The DS75LX thermostat has two operating modes, comparator mode and interrupt mode, which activate and
deactivate the open-drain thermostat output (O.S.) based on user-programmable trip-points (T
OS
and T
HYST
). The
DS75LX powers up with the thermostat in comparator mode with active-low O.S. polarity and with the
overtemperature trip-point (T
OS
) register set to +80癈 and the hysteresis trip-point (T
HYST
) register set to +75癈. If
these power-up settings are compatible with the application, the DS75LX can be used as a stand-alone thermostat
(i.e., no 2-wire communication required). If interrupt mode operation, active-high O.S. polarity, or different T
OS
and
T
HYST
values are desired, they must be programmed after power-up, so stand-alone operation is not possible.
In both operating modes, the user can program the thermostat fault tolerance, which sets how many consecutive
temperature readings (1, 2, 4, or 6) must fall outside of the thermostat limits before the thermostat output is
triggered. The fault tolerance is set by the F1 and F0 bits in the configuration register and at power-up the fault
tolerance is 1.
The data format of the T
OS
and T
HYST
registers is identical to that of the temperature register (see Figure 2), i.e., a
2-byte twos complement representation of the trip-point temperature in degrees celcius with bits 3 through 0
hardwired to 0. After every temperature conversion, the measured temperature is compared to the values in the
T
OS
and T
HYST
registers, and then O.S. is updated based on the result of the comparison and the operating mode.
The number of T
OS
and T
HYST
bits used during the thermostat comparison is equal to the conversion resolution set
by the R1 and R0 bits in the configuration register. For example, if the resolution is 9 bits, only the 9 MSbs of T
OS
and T
HYST
will be used by the thermostat comparator.
The active state of the O.S. output can be changed by the POL bit in the configuration register. The power-up
default is active low.
If the user does not wish to use the thermostat capabilities of the DS75LX, the O.S. output should be left floating.
Note that if the thermostat is not used, the T
OS
and T
HYST
registers can be used for general storage of system data.
Comparator Mode
When the thermostat is in comparator mode, O.S. can be programmed to operate with any amount of hysteresis.
The O.S. output becomes active when the measured temperature exceeds the T
OS
value a consecutive number of
times as defined by the F1 and F0 fault tolerance (FT) bits in the configuration register. O.S. then stays active until
the first time the temperature falls below the value stored in T
HYST
. Putting the device into shutdown mode does not
clear O.S. in comparator mode. Thermostat comparator mode operation with FT = 2 is illustrated in Figure 3.
Interrupt Mode
In interrupt mode, the O.S. output first becomes active when the measured temperature exceeds the T
OS
value a
consecutive number of times equal to the FT value in the configuration register. Once activated, O.S. can only be
cleared by either putting the DS75LX into shutdown mode or by reading from any register (temperature,
configuration, T
OS
, or T
HYST
) on the device. Once O.S. has been deactivated, it will only be reactivated when the
measured temperature falls below the T
HYST
value a consecutive number of times equal to the FT value. Again, O.S
can only be cleared by putting the device into shutdown mode or reading any register. Thus, this interrupt/clear
process is cyclical between T
OS
and T
HYST
events (i.e, T
OS
, clear, T
HYST
, clear, T
OS
, clear, T
HYST
, clear, etc.).
Thermostat interrupt mode operation with FT = 2 is illustrated in Figure 3.