- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄379184 > DS3832C-311 3.3V, 32Mb Advanced NV SRAM with Clock PDF資料下載
參數(shù)資料
| 型號(hào)： | DS3832C-311 |
| 英文描述： | 3.3V, 32Mb Advanced NV SRAM with Clock |
| 中文描述： | 3.3，32MB的高級(jí)非易失SRAM，帶有時(shí)鐘 |
| 文件頁(yè)數(shù)： | 8/18頁(yè) |
| 文件大?。?/td> | 428K |
| 代理商： | DS3832C-311 |
第1頁(yè)第2頁(yè)第3頁(yè)第4頁(yè)第5頁(yè)第6頁(yè)第7頁(yè)當(dāng)前第8頁(yè)第9頁(yè)第10頁(yè)第11頁(yè)第12頁(yè)第13頁(yè)第14頁(yè)第15頁(yè)第16頁(yè)第17頁(yè)第18頁(yè)
DS3832C-311
8 of 18
registers have been read or written, setting TE high re-enables external register updates. While TE is set
low and the external registers are frozen, the internal registers continue to be incremented.
TIME-OF-DAY ALARM REGISTERS
Registers 3, 5, and 7 contain the time-of-day alarm registers. Bits 3, 4, 5, and 6 of register 7 always read
zero regardless of how they are written. Bit 7 of registers 3, 5, and 7 are mask bits (see Figure 4). When
all of the mask bits are logic 0, a time-of-day alarm only occurs when registers 2, 4, and 6 match the
values stored in registers 3, 5, and 7. An alarm is generated every day when bit 7 of register 7 is set to
logic 1. Similarly, an alarm is generated every hour when registers 7 and 5 both have bit 7 set to logic 1.
When registers 7, 5, and 3 all have bit 7 set to logic 1, an alarm occurs every minute at the point where
register 1 (seconds) rolls over from 59 to 00. Whenever an alarm occurs, the time-of-day alarm flag TDF
(register B, bit 0) and the internal time-of-day interrupt signal goes to the active state. If the interrupt-
switch bit IPSW (register B, bit 6) is set to a logic 0 and the time-of-day alarm mask bit TDM (register B,
bit 3) is logic 0, the interrupt-output pin
INT
also activates.
Time-of-day alarm registers are written and read in the same format as the day, date, and time registers.
The time-of-day alarm flag, time-of-day interrupt, and
INT
output are always cleared when the time-of-
day alarm registers are read or written.
WATCHDOG ALARM REGISTERS
Registers C and D contain the timeout period for the watchdog alarm. The two registers contain a count
from 0.01 to 99.99 seconds in BCD format. The two watchdog alarm registers can be written or read in
any order. After a new value is entered or either of the watchdog alarm registers is read, an internal
watchdog timer starts counting down from the entered watchdog alarm register value toward zero. When
zero is reached, the watchdog alarm flag (register B, bit 1) and the internal watchdog interrupt signal go to
the active state. If the interrupt switch bit IPSW (register B bit 6) is set to logic 1 and the watchdog alarm
mask bit WAM (register B, bit 3) is logic 0, the interrupt output
INT
also activates. The watchdog timer
countdown is interrupted and the timer is re-initialized to the value in the watchdog alarm registers every
time either watchdog alarm register is accessed. Controlled, periodic accesses to the watchdog alarm
registers can prevent the activation of the watchdog alarm flag, the internal watchdog interrupt signal and
the
INT
output. The watchdog alarm registers always read the value entered. The actual watchdog timer is
internal and is not accessible. Writing 00h to registers C and D disables the watchdog alarm feature.
COMMAND REGISTER
Register B, the command register, contains control bits and flag bits. The operation of each bit is
described below.
TE—Transfer Enable (Bit 7).
When set to logic 0, this bit disables the transfer of data between internal
and external clock registers. The contents of the external registers are frozen and reads and writes of day,
date, and time information are not affected by updates. This bit must be set to logic 1 to enable updates.
IPSW—Interrupt Switch (Bit 6).
This bit should be initialized to logic 1 to connect the internal
watchdog interrupt signal to the
INT
output pin. Setting this bit to logic 0 connects the internal time-of-
day interrupt signal to the
INT
output pin.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| DS3884 | Pythagoras Processor |
| DS4000 | RECT BRIDGE 15A 1000V WIRE LEADS |
| DS4000N | RECT BRIDGE 15A 100V WIRE LEADS |
| DS4025 | RECT BRIDGE 15A 200V WIRE LEADS |
| DS4301 | Nonvolatile, 32-Position Digital Potentiometer |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| DS38432 | 制造商:Maxim from Components Direct 功能描述:MAXIM DS38432 - Tape and Reel 制造商:Maxim 功能描述:Maxim DS38432 |
| DS38452-228 | 制造商:Rochester Electronics LLC 功能描述: 制造商:Maxim Integrated Products 功能描述: |
| DS38452-452 | 制造商:Rochester Electronics LLC 功能描述: 制造商:Maxim Integrated Products 功能描述: |
| DS38464 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:3.3V 64k x 40 NV SRAM SIMM |
| DS38464-070 | 制造商:Rochester Electronics LLC 功能描述: 制造商:Maxim Integrated Products 功能描述: |
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。