I2C Gamma and VCOM Buffer with EEP" />
參數(shù)資料
型號(hào)： DS3514T+T&R
廠商： Maxim Integrated Products
文件頁(yè)數(shù)： 17/21頁(yè)
文件大?。?/td> 0K
描述： IC I2C GAMMA/VCOM BUFF 48-TQFN
產(chǎn)品培訓(xùn)模塊： Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標(biāo)準(zhǔn)包裝： 2,500
應(yīng)用： TFT-LCD 面板：伽瑪緩沖器，VCOM 驅(qū)動(dòng)器
輸出類型： 滿擺幅
電路數(shù)： 14
電流 - 電源： 5mA
電流 - 輸出 / 通道： 4mA
電壓 - 電源，單路/雙路(±)： 9 V ~ 15 V
安裝類型： 表面貼裝
封裝/外殼： 48-WFQFN 裸露焊盤(pán)
供應(yīng)商設(shè)備封裝： 48-TQFN-EP（7x7）
包裝： 帶卷 (TR)
DS3514
I2C Gamma and VCOM Buffer with EEPROM
_______________________________________________________________________________________
5
NONVOLATILE MEMORY CHARACTERISTICS
(VCC = +2.7V to +5.5V.)
PARAMETER
SYMBOL
CONDITIONS
MIN
MAX
UNITS
TA = +85°C (Guaranteed by design)
50,000
EEPROM Write Cycles
TA = +25°C (Guaranteed by design)
200,000
Writes
Note 1:
All voltages are referenced to ground. Currents entering the IC are specified positive and currents exiting the IC are
negative.
Note 2:
If VCC is less than +2.7V or is left unconnected, the DS3514 pulls the I2C bus to VCC, preventing communication with other
devices on the I2C bus.
Note 3:
IDD supply current is specified with VDD = 15.0V and no load on VCOM or GM1–GM14 outputs.
Note 4:
ICC is specified with the following conditions: SCL = 400kHz, SDA = VCC = 5.5V, and VCOM and GM1–GM14 floating.
Note 5:
ICCQ is specified with the following conditions: SCL = SDA = VCC = 5.5V, and VCOM and GM1–GM14 floating.
Note 6:
IDDQ is specified with the following conditions: SCL = SDA = VCC = 5.5V and VCOM and GM1–GM14 floating.
Note 7:
This is the minimum VCC voltage that causes EEPROM to be recalled.
Note 8:
This is the time from VCC > VPOR and VDD > VDD(MIN) until the device is powered up.
Note 9:
Integral nonlinearity is the deviation of a measured value from the expected values at each particular setting. Expected
value is calculated by connecting a straight line from the measured minimum setting to the measured maximum setting.
INL = [V(RW)i - (V(RW)0]/LSB(measured) - i, for i = 0...N (N = 255 for VCOM, 1023 for GM1–GM14).
Note 10: Differential nonlinearity is the deviation of the step-size change between two LSB settings from the expected step size. The
expected LSB step size is the slope of the straight line from measured minimum position to measured maximum position.
DNL = [V(RW)i+1 - (V(RW)i]/LSB(measured) - 1, for i = 0...(N - 1) (N = 255 for VCOM, 1023 for GM1–GM14).
Note 11: Specified with the VCOM and gamma bias currents set to 100% (CR.5 = 1, CR.4 = 0).
Note 12: EEPROM data is assumed already settled at input of Latch B. LD transitions after EEPROM byte has been selected.
Note 13: Rising transition from 5V to 10V; falling transition from 10V to 5V.
Note 14: I2C interface timing shown is for fast-mode (400kHz) operation. This device is also backward-compatible with I2C
standard-mode timing.
Note 15: CB—total capacitance of one bus line in picofarads.
Note 16: EEPROM write time begins after a STOP condition occurs.
Note 17: Pulses narrower than max are suppressed.
8-BIT
DAC
0.1
μF
2.2
Ω
0 TO 1.5V
50kHz
CD = 1
μF
80h
VRH
VDD
VCOM
VRL
DS3514
Figure 1. VCOM Settling Timing Diagram
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