參數(shù)資料
型號: DS28EA00U+T&R
廠商: Maxim Integrated
文件頁數(shù): 12/29頁
文件大小: 328K
描述: IC THERMOMETER 1-WIRE 8-USOP
產(chǎn)品培訓模塊: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標準包裝: 3,000
功能: 溫度計,恒溫計
傳感器類型: 內(nèi)部
感應溫度: -40°C ~ 85°C
精確度: ±0.5°C(最小值)
拓撲: 寄存器庫,變簽式暫存器
輸出類型: 數(shù)字
輸出警報:
輸出風扇:
電源電壓: 3 V ~ 5.5 V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 8-TSSOP,8-MSOP(0.118",3.00mm 寬)
供應商設備封裝: 8-uMAX
包裝: 帶卷 (TR)
as the new PIO output state arrives in its true form at the
PIO pin. To protect the transmission against data errors,
the master must repeat the PIO output data byte in its
inverted form. Only if the transmission was error-free can
the PIO status change. The actual PIO transition to the
new state occurs with a delay of t
REH
+ x from the rising
edge of the MS bit of the inverted PIO byte, as shown in
Figure 7. The value of x is approximately 0.2祍. To
inform the master about the successful communication
of the PIO byte, the DS28EA00 transmits a confirmation
byte with the data pattern AAh. While the MS bit of the
confirmation byte is transmitted, the DS28EA00 samples
the state of the PIO pins, as shown in Figure 6, and
sends it to the master. The master can either continue
writing more data to the PIO or issue a 1-Wire reset to
end the command.
Chain [99h]
This command allows the master to put the DS28EA00
into one of the three chain states, as shown in Figure 8.
The device powers up in the chain OFF state. To transi-
tion a DS28EA00 from one state to another, the master
must send a suitable chain control byte after the Chain
command code. Only the codes 3Ch, 5Ah, and 96h
(true form) are valid, assigned to OFF, ON, and DONE,
in this sequence. This control byte is first transmitted in
its true form and then in its inverted form. If the chain
state change was successful, the master receives AAh
confirmation bytes. If the change was not successful
(control byte transmission error, invalid control byte),
the master reads 00h bytes instead.
1-Wire Digital Thermometer with
Sequence Detect and PIO
DS28EA00
12
Maxim Integrated
t
REH
 + X
V
TH
IO
PIO
MOST SIGNIFICANT 2 BITS OF INVERTED PIO OUTPUT DATA BYTE
LEAST SIGNIFICANT 2 BITS OF CONFIRMATION BYTE (AAh)
Figure 7. PIO Access Write Timing Diagram
THESE TRANSITIONS ARE PERMISSIBLE, BUT DO NOT
OCCUR DURING NORMAL OPERATION.
OFF
POWER-ON RESET (POR)
CHAIN DONE
CHAIN ON
CHAIN ON
CHAIN DONE
CHAIN OFF
OR POR
DONE
ON
Figure 8. Chain State Transition Diagram
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