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參數(shù)資料
| 型號(hào)： | DS26900LN+ |
| 廠商： | Maxim Integrated Products |
| 文件頁數(shù)： | 26/49頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC JTAG MUX/SWITCH 144-LQFP |
| 標(biāo)準(zhǔn)包裝： | 90 |
| 系列： | * |
| 功能： | * |
| 電壓電源： | 單電源 |
| 電壓 - 電源，單路/雙路(±)： | 3.14 V ~ 3.47 V |
| 電流 - 電源： | * |
| 工作溫度： | * |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 144-LQFP |
| 供應(yīng)商設(shè)備封裝： | 144-LQFP（20x20） |
| 包裝： | 托盤 |
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__________________________________________________________________________________________DS26900
32
Register Name:
DCR
Register Description:
6-Bit Device Configuration Register
Bit #
7
6
5
4
3
2
1
0
Name
—
TM_SLAVE
DPDV
TMSi
TDIi
TDOi
TCKi
Reset
—
0
Bit 5: Test Master Slave Enable (TM_SLAVE). Determines in conjunction with M[1:0] if the DS26900 device will
drive nonmaster TM1/TM2 as slaves. If the TM buses are in parallel with more than one DS26900, only one
DS26900 can drive TM1/TM2 as a slave. The following table describes the combinations.
MODE
M[1:0]
TM_SLAVE BIT
TM1/TM2 SLAVE CAPABLE
Single-Package
00
0
No
Single-Package
00
1
Yes
Cascade Master
01
N/A
Yes
Cascade Extension
10
N/A
No
Deselect
11
N/A
Bit 4: Deselected Port Drive Values (DPDV). This bit determines the logic levels driving a deselected secondary
port according to the following table. Note: This configuration bit does not apply to TM1 or TM2 in slave mode. TM1
or TM2 port signals in slave mode will never be high impedance.
A secondary port is not selected (deselected) when device is in switch configuration mode, or when the particular
port address is not loaded in the Secondary Port Selection Register (SPSR). The state of this bit can be monitored
via the DPDV pin.
SIGNAL
DPDV = 0
DPDV = 1
STMSn
0
HiZ
*
STRSTn
1
STDIn
0
HiZ
*
STCKn
0
*HiZ is a high-impedance state with no internal pullup/down resistors active.
Bit 3: Test Mode Select Invert (TMSi). Invert the TMS signal from the arbitrated master to the selected slave port
by setting this bit to logic 1.
Bit 2: Test Data In Invert (TDIi). Invert the TDI signal from the arbitrated master to the selected slave port by
setting this bit to logic 1.
Bit 1: Test Data Out Invert (TDOi). Invert the TDO signal from the selected slave port to the arbitrated master by
setting this bit to logic 1.
Bit 0: Test Clock Invert (TCKi). Invert the TCK from the arbitrated master to the selected slave port by setting this
bit to logic 1.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| DS26900LN+ | 功能描述:多路器開關(guān) IC JTAG MUX RoHS:否 制造商:Texas Instruments 通道數(shù)量:1 開關(guān)數(shù)量:4 開啟電阻（最大值）:7 Ohms 開啟時(shí)間（最大值）: 關(guān)閉時(shí)間（最大值）: 傳播延遲時(shí)間:0.25 ns 工作電源電壓:2.3 V to 3.6 V 工作電源電流: 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:UQFN-16 |
| DS26900N+ | 制造商:MAXIM 制造商全稱:Maxim Integrated Products 功能描述:JTAG Multiplexer/Switch |
| DS26C31 | 制造商:NSC 制造商全稱:National Semiconductor 功能描述:CMOS QUAD TRI-STATE DIFFERENTIAL LINE DRIVER |
| DS26C31 DIE | 制造商:Texas Instruments 功能描述: |
| DS26C31_BBA3026X WAF | 制造商:Texas Instruments 功能描述: |
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