參數資料
型號: DS26303GN-75
廠商: Maxim Integrated Products, Inc.
英文描述: 3.3V, E1/T1/J1, Short-Haul, Octal Line Interface Unit
中文描述: 3.3,E1/T1/J1,短途,八線路接口單元
文件頁數: 68/97頁
文件大?。?/td> 966K
代理商: DS26303GN-75
DS26303: 3.3V, T1/E1/J1, Short-Haul, Octal Line Interface Unit
68 of 97
6.9.2.2
Receive Repetitive Pattern Synchronization
Repetitive pattern synchronization synchronizes the receive pattern generator to the incoming repetitive pattern.
The receive pattern generator is synchronized by searching each incoming data stream bit position for the
repetitive pattern, and then checking the next 32 data stream bits. Synchronization is achieved if all 32 bits match
the incoming pattern. If at least six incoming bits in the current 64-bit window do not match the receive PRBS
pattern generator, automatic pattern resynchronization is initiated. Automatic pattern resynchronization can be
disabled.
See
Figure 6-12
for the repetitive pattern synchronization state diagram.
Figure 6-12. Repetitive Pattern Synchronization State Diagram
Sync
Match
Verify
1 bit error
Pattern Matches
3 i ihueos
6o6 i ihros
6.9.2.3
Receive Pattern Monitoring
Receive pattern monitoring monitors the incoming data stream for both an OOS condition and bit errors and counts
the incoming bits. An out-of-synchronization (OOS) condition is declared when the synchronization state machine
is not in the sync state. An OOS condition is terminated when the synchronization state machine is in the sync
state.
Bit errors are determined by comparing the incoming data stream bit to the receive pattern generator output. If they
do not match, a bit error is declared, and the bit error and bit counts are incremented. If they match, only the bit
count is incremented. The bit count and bit-error count are not incremented when an OOS condition exists.
6.9.3 Transmit Pattern Generation
Pattern generation generates the outgoing test pattern and passes it onto error insertion. The transmit pattern
generator is a 32-bit shift register that shifts data from the least significant bit (LSB) or bit 1 to the most significant
bit (MSB) or bit 32. The input to bit 1 is the feedback. For a PRBS pattern (generating polynomial x
+ x
+ 1), the
feedback is an XOR of bit n and bit y. For a repetitive pattern (length n), the feedback is bit n. The values for n and
y are individually programmable (1 to 32). The output of the receive pattern generator is the feedback. If QRSS is
enabled, the feedback is an XOR of bits 17 and 20, and the output will be forced to one if the next 14 bits are all 0s.
QRSS is programmable (on or off). For PRBS and QRSS patterns, the feedback will be forced to 1 if bits 1 to 31
相關PDF資料
PDF描述
DS26303L-120 3.3V, E1/T1/J1, Short-Haul, Octal Line Interface Unit
DS26303L-75 3.3V, E1/T1/J1, Short-Haul, Octal Line Interface Unit
DS26303LN-120 3.3V, E1/T1/J1, Short-Haul, Octal Line Interface Unit
DS26303LN-75 3.3V, E1/T1/J1, Short-Haul, Octal Line Interface Unit
DS26518 8-Port T1/E1/J1 Transceiver
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