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參數資料
| 型號： | DS2506 |
| 廠商： | MAXIM INTEGRATED PRODUCTS INC |
| 元件分類： | DRAM |
| 英文描述： | 64K bit Add-Only Memory(64K位只加存儲器) |
| 中文描述： | 64K X 1 OTPROM, PBCY3 |
| 封裝： | PR-35, 3 PIN |
| 文件頁數： | 2/24頁 |
| 文件大?。?/td> | 148K |
| 代理商： | DS2506 |
DS2506
052298 2/24
programmed and then write–protected if desired. Alter-
natively, the part may be programmed multiple times
with new data being appended to, but not overwriting,
existing data with each subsequent programming of the
device. Note: Individual bits can be changed only from a
logical 1 to a logical 0, never from a logical 0 to a
logical 1. A provision is also included for indicating that a
certain page or pages of data are no longer valid and
have been replaced with new or updated data that is
now residing at an alternate page address. This page
address redirection allows software to patch data and
enhance the flexibility of the device as a stand–alone
database. The 48–bit serial number that is factory–
lasered into each DS2506 provides a guaranteed
unique identity which allows for absolute traceability.
The PR35 and SOIC packages provide a compact
enclosure that allows standard assembly equipment to
handle the device easily for attachment to printed circuit
boards or wiring. Typical applications include storage of
calibration constants, maintenance records, asset
tracking, product revision status and access codes.
OVERVIEW
The block diagram in Figure 1 shows the relationships
between the major control and memory sections of the
DS2506. The DS2506 has three main data compo-
nents: 1) 64–bit lasered ROM, 2) 65536–bits EPROM
Data Memory, and 3) 2816–bits EPROM Status
Memory. The device derives its power for read opera-
tions entirely from the 1–Wire communication line by
storing energy on an internal capacitor during periods of
time when the signal line is high and continues to oper-
ate off of this “parasite” power source during the low
times of the 1–Wire line until it returns high to replenish
the parasite (capacitor) supply. During programming,
1–Wire communication occurs at normal voltage levels
and then is pulsed momentarily to the programming
voltage to cause the selected EPROM bits to be pro-
grammed. The 1–Wire line must be able to provide
12 volts and 10 milliamperes to adequately program the
EPROM portions of the part. Whenever programming
voltages are present on the 1–Wire line a special high
voltage detect circuit within the DS2506 generates an
internal logic signal to indicate this condition. The hierar-
chical structure of the 1–Wire protocol is shown in Fig-
ure 2. The bus master must first provide one of the six
ROM Function Commands, 1) Read ROM, 2) Match
ROM, 3) Search ROM, 4) Skip ROM, 5) Overdrive–Skip
ROM or 6) Overdrive–Match ROM. Upon completion of
an Overdrive ROM command byte executed at regular
speed, the device will enter the Overdrive mode where
all subsequent communication occurs at a higher
speed. These commands operate on the 64–bit lasered
ROM portion of each device and can singulate a specific
device if many are present on the 1–Wire line as well as
indicate to the bus master how many and what types of
devices are present. The protocol required for these
ROM Function Commands is described in Figure 8.
After a ROM Function Command is successfully
executed, the memory functions that operate on the
EPROM portions of the DS2506 become accessible
and the bus master may issue any one of the five
Memory Function Commands specific to the DS2506 to
read or program the various data fields. The protocol for
these Memory Function Commands is described in
Figure 5. All data is read and written least significant bit
first.
64–BIT LASERED ROM
Each DS2506 contains a unique ROM code that is
64 bits long. The first eight bits are a 1–Wire family code.
The next 48 bits are a unique serial number. The last
eight bits are a CRC of the first 56 bits. (See Figure 3).
The 64–bit ROM and ROM Function Control section
allow the DS2506 to operate as a 1–Wire device and fol-
low the 1–Wire protocol detailed in the section “1–Wire
Bus System.” The memory functions required to read
and program the EPROM sections of the DS2506 are
not accessible until the ROM function protocol has been
satisfied. This protocol is described in the ROM func-
tions flow chart (Figure 8). The 1–Wire bus master must
first provide one of six ROM function commands: 1)
Read ROM, 2) Match ROM, 3) Search ROM, 4) Skip
ROM, 5) Overdrive–Skip ROM or 6) Overdrive–Match
ROM. After a ROM function sequence has been suc-
cessfully executed, the bus master may then provide
any one of the memory function commands specific to
the DS2506 (Figure 5).
The 1–Wire CRC of the lasered ROM is generated using
the polynomial X
8
+ X
5
+ X
4
+ 1. Additional information
about the Dallas Semiconductor 1–Wire Cyclic Redun-
dancy Check is available in the Book of DS19xx
iButton Standards. The shift register acting as the CRC
accumulator is initialized to zero. Then starting with the
least significant bit of the family code, one bit at a time is
shifted in. After the eighth bit of the family code has been
entered, then the serial number is entered. After the
48th bit of the serial number has been entered, the shift
register contains the CRC value. Shifting in the eight bits
of CRC should return the shift register to all zeroes.
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相關代理商/技術參數 |
參數描述 |
|---|---|
| DS2506+ | 制造商:Maxim Integrated Products 功能描述:64-KBIT ADD-ONLY MEMORY 3PIN PR35 - Bulk |
| DS2506S | 制造商:Maxim Integrated Products 功能描述:ADD-O MEM 64KB, SOIC8 (GENERIC) - Rail/Tube |
| DS2506S+ | 制造商:Maxim Integrated Products 功能描述:64-KBIT ADD-ONLY MEMORY 8SOIC - Rail/Tube 制造商:Maxim Integrated Products 功能描述:64KB ADD-ONLY MEMORY 制造商:Maxim Integrated Products 功能描述:IC EPROM 64KBIT SMD 2506 SOIC8 |
| DS2506S-UNW | 制造商:DALLAS 制造商全稱:Dallas Semiconductor 功能描述:UniqueWare Add-Only Memory |
| DS2506S-UNW-PPPP | 制造商:DALLAS 制造商全稱:Dallas Semiconductor 功能描述:UniqueWare Add-Only Memory |
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