DS2480B
Maxim Integrated........................................................................................................................................................................................... 16
1-WIRE COMMUNICATION WAVEFORMS
One of the major features of the DS2480B is that it relieves the host from generating the timing of the
1-Wire signals and sampling the 1-Wire bus at the appropriate times. How this is done for the
reset/presence detect sequence is shown in Figure 6a. This sequence is composed of four timing
segments: the reset low time tRSTL, the short/interrupt sampling offset tSI, the presence detect sampling
offset tPDT and a delay time tFILL. The timing segments tSI, tPDT and tFILL comprise the reset high time tRSTH
where 1-Wire slave devices assert their presence or interrupt pulse. During this time the DS2480B pulls
the 1-Wire bus high with its weak pullup current.
The values of all timing segments for all 1-Wire speed options are shown in the table. Since the
reset/presence sequence is slow compared to the time slots, the values for standard and flexible speed are
the same. Except for the falling edge of the presence pulse all edges are controlled by the DS2480B. The
shape of the uncontrolled falling edge is determined by the capacitance of the 1-Wire bus and the number,
speed and sink capability of the slave devices connected.
Figure 6a. RESET/PRESENCE DETECT
Speed
tRSTL
tSI
tPDT
tFILL
tRSTH
Standard
512s
8s
64s
512s
584s
Overdrive
64s
2s
8s
64s
74s
Flexible
512s
8s
64s
512s
584s
After having received the command code for generating a reset/presence sequence, the DS2480B pulls
the 1-Wire bus low for tRSTL and then lets it go back to 5V. The DS2480B will now wait for the
short/interrupt sampling offset tSI to expire and then test the voltage on the 1-Wire bus to determine if
there is a short or an interrupt signal. If there is no short or interrupt (as shown in the picture), the
DS2480B will wait for tPDT and test the voltage on the 1-Wire bus for a presence pulse. Regardless of the
result of the presence test, the DS2480B will then wait for tFILL to expire and then send the command
response byte to the host.
If the test for interrupt or short reveals a logic 0, the DS2480B will wait for 4096s and then test the
1-Wire bus again. If a logic 0 is detected, the 1-Wire bus is shorted and a command response byte with
the code for SHORT will be sent immediately. If a logic 1 is detected, the device will wait for tFILL to
expire, after which it will send the command response byte with the code for an alarming presence pulse.
No additional testing for a presence pulse will be done. The DS2480B will perform the short/interrupt
testing as described also at Overdrive speed, although interrupt signaling is only defined for standard
speed.
The idle time following the Reset/Presence Detect sequence depends on the serial communication speed
and the host’s response time.