參數(shù)資料
型號: DS21Q58L+
廠商: Maxim Integrated Products
文件頁數(shù): 44/74頁
文件大?。?/td> 0K
描述: IC TXRX E1 QUAD 3.3V 100LQFP
產(chǎn)品培訓(xùn)模塊: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標準包裝: 90
功能: 收發(fā)器
接口: E1
電路數(shù): 4
電源電壓: 3.14 V ~ 3.47 V
電流 - 電源: 230mA
工作溫度: 0°C ~ 70°C
安裝類型: 表面貼裝
封裝/外殼: 100-LQFP
供應(yīng)商設(shè)備封裝: 100-LQFP(14x14)
包裝: 托盤
包括: AIS 警報檢測器和發(fā)生器,回送功能,PRBS 發(fā)生器 / 檢測器,遠程檢測器和發(fā)生器
產(chǎn)品目錄頁面: 1429 (CN2011-ZH PDF)
DS21Q58 E1 Quad Transceiver
49 of 74
21.3 Transmit Waveshaping and Line Driving
The DS21Q58 uses a set of laser-trimmed delay lines and a precision digital-to-analog converter (DAC) to create
the waveforms that are transmitted onto the E1 line. The waveforms meet the ITU G.703 specifications
(Figure 21-4). The user selects which waveform is to be generated by properly programming the L2/L1/L0 bits in
the line interface control register (LICR). The DS21Q58 can be set up in a number of various configurations
depending on the application (Table 21-2).
Table 21-2. Line Build-Out Select in LICR
L2
L1
L0
APPLICATION
TRANSFORMER
RETURN LOSS
*
Rt (
W)
**
0
75
W normal
1:2 step-up
N.M.
0
1
120
W normal
1:2 step-up
N.M.
0
1
0
75
W with protection resistors
1:2 step-up
N.M.
2.5
0
1
120
W with protection resistors
1:2 step-up
N.M.
2.5
1
0
75
W with high return loss
1:2 step-up
21dB
6.2
1
0
1
120
W with high return loss
1:2 step-up
21dB
11.6
*N.M. = Not meaningful (return loss value too low for significance)
**Refer to Application Note 336: Transparent Operation on T1, E1 Framers and Transceivers for details on E1 line interface design.
Because of the nature of the transmitter’s design, very little jitter (less than 0.005UIP-P broadband from 10Hz to
100kHz) is added to the jitter present on TCLK (or source used for transmit clock). Also, the waveform created is
independent of the duty cycle of TCLK. The device’s transmitter couples to the E1-transmit shielded twisted pair or
coax through a 1:2 step-up transformer, as shown in Figure 21-2. For the devices to create the proper waveforms,
the transformer used must meet the specifications listed in Table 21-3. The line driver in the device contains a
current limiter that prevents more than 50mA (RMS) from being sourced in a 1
W load.
Table 21-3. Transformer Specifications
SPECIFICATION
RECOMMENDED VALUE
Turns Ratio
1:1 (receive) and 1:2 (transmit) ±3%
Primary Inductance
600
mH minimum
Leakage Inductance
1.0
mH maximum
Intertwining Capacitance
40pF maximum
DC Resistance
1.2
W maximum
Figure 21-2. External Analog Connections (Basic Configuration)
RTIP
RRING
TTIP
TRING
E1 TRANSMIT
LINE
DS21Q58
0.47
mF
(NONPOLARIZED)
DVDD
DVSS
0.1
mF
RVDD
RVSS
0.1
mF
TVDD
TVSS
0.1
mF
+3.3V
Rr
0.1
mF
0.01
mF
2.048MHz
MCLK
1 : 1
2 : 1
Rr
1/4
E1 RECEIVE
LINE
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