參數(shù)資料
型號(hào): DS21Q44T
廠商: MAXIM INTEGRATED PRODUCTS INC
元件分類: Digital Transmission Controller
英文描述: DATACOM, FRAMER, PQFP128
封裝: TQFP-128
文件頁數(shù): 16/105頁
文件大小: 702K
代理商: DS21Q44T
DS21Q44
18 of 105
Signal Name:
RPOS
Signal Description:
Receive Positive Data Input
Signal Type:
Input
Sampled on the falling edge of RCLK for data to be clocked through the receive side framer. RPOS and
RNEG can be tied together for an NRZ interface. Connecting RPOS to RNEG disables the bipolar
violation monitoring circuitry.
Signal Name:
RNEG
Signal Description:
Receive Negative Data Input
Signal Type:
Input
Sampled on the falling edge of RCLK for data to be clocked through the receive side framer. RPOS and
RNEG can be tied together for an NRZ interface. Connecting RPOS to RNEG disables the bipolar
violation monitoring circuitry.
PARALLEL CONTROL PORT PINS
Signal Name:
INT*
Signal Description:
Interrupt
Signal Type:
Output
Flags host controller during conditions and change of conditions defined in the Status Registers 1 and 2
and the FDL Status Register. Active low, open drain output.
Signal Name:
FMS
Signal Description:
Framer Mode Select
Signal Type:
Input
Set low to select DS21Q44 feature set. Set high to select DS21Q43 emulation.
Signal Name:
MUX
Signal Description:
Bus Operation
Signal Type:
Input
Set low to select non–multiplexed bus operation. Set high to select multiplexed bus operation.
Signal Name:
D0 TO D7 / AD0 TO AD7
Signal Description:
Data Bus or Address/Data Bus
Signal Type:
Input /Output
In non–multiplexed bus operation (MUX = 0), serves as the data bus. In multiplexed bus operation
(MUX = 1), serves as a 8–bit multiplexed address / data bus.
Signal Name:
A0 TO A5, A7
Signal Description:
Address Bus
Signal Type:
Input
In non–multiplexed bus operation (MUX = 0), serves as the address bus. In multiplexed bus operation
(MUX = 1), these pins are not used and should be tied low.
Signal Name:
ALE (AS) / A6
Signal Description:
Address Latch Enable (Address Strobe) or A6
Signal Type:
Input
In non–multiplexed bus operation (MUX = 0), serves as address bit 6. In multiplexed bus operation
(MUX = 1), serves to demultiplex the bus on a positive–going edge.
相關(guān)PDF資料
PDF描述
DS21Q44TN DATACOM, FRAMER, PQFP128
DS21Q48N DATACOM, PCM TRANSCEIVER, PBGA144
DS21Q48 DATACOM, PCM TRANSCEIVER, PBGA144
DS21Q552 DATACOM, PCM TRANSCEIVER, PBGA256
DS2250-32-16 8-BIT, 16 MHz, MICROCONTROLLER, SMA40
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