參數(shù)資料
型號: DS21Q43ATN
元件分類: 通信及網(wǎng)絡
英文描述: Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0
中文描述: Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0
文件頁數(shù): 30/60頁
文件大?。?/td> 748K
代理商: DS21Q43ATN
DS21Q43A
30 of 60
5.3 E-Bit Counter
E-bit Count Register 1 (EBCR1) is the most significant word and EBCR2 is the least significant word of
a 10-bit counter that records Far End Block Errors (FEBE) as reported in the 1
st
bit of frames 13 and 15
on E1 lines running with CRC4 multiframe. These count registers will increment once each time the
received E-bit is set to 0. Since the maximum E-bit count in a 1-second period is 1000, this counter
cannot saturate. The counter is disabled during loss of sync at either the FAS or CRC4 level; it will
continue to count if loss of multiframe sync occurs at the CAS level.
EBCR1: E-BIT COUNT REGISTER 1
(Address=04 Hex)
EBCR2: E-BIT COUNT REGISTER 2
(Address=05 Hex)
(MSB) (LSB)
(note 1)
(note 1)
(note 1)
(note 1)
EB7
EB6
EB5
EB4
(note 1)
EB3
(note 1)
EB2
EB9
EB1
EB8
EB0
EBCR1
EBCR2
SYMBOL
POSITION
NAME AND DESCRIPTION
EB9
EBCR1.1
MSB of the 10-bit E-Bit count.
EB0
EBCR2.0
LSB of the 10-bit E-Bit count.
NOTE:
1.
The upper 6 bits of EBCR1 at address 04 are the least significant bits of the 12-bit FAS error counter.
5.4 FAS Error Counter
FAS Count Register 1 (FASCR1) is the most significant word and FASCR2 is the least significant word
of a 12-bit counter that records word errors in the Frame Alignment Signal in timeslot 0. This counter is
disabled during loss of frame synchronization conditions; it is not disabled during loss of synchronization
at either the CAS or CRC4 multiframe level. Since the maximum FAS word error count in a 1-second
period is 4000, this counter cannot saturate.
FASCR1: FAS BIT COUNT REGISTER 1
(Address=02 Hex)
FASCR2: FAS BIT COUNT REGISTER 2
(Address=04 Hex)
(MSB) (LSB)
FAS11
FAS10
FAS9
FAS8
FAS5
FAS4
FAS3
FAS2
FAS7
FAS1
FAS6
FAS0
(note 2)
(note 1)
(note 2)
(note 1)
FASCR1
FASCR2
SYMBOL
POSITION
NAME AND DESCRIPTION
FAS11
FASCR1.7
MSB of the 12-bit FAS error count.
FAS0
FASCR2.2
LSB of the 12-bit FAS error count.
NOTES:
1.
The lower 2 bits of FASCR1 at address 02 are the most significant bits of the 10-bit CRC4 error
counter.
2.
The lower 2 bits of FASCR2 at address 04 are the most significant bits of the 10-bit E-Bit counter.
相關PDF資料
PDF描述
DS21Q44 Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0
DS21Q44T Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0
DS21Q44TN MICROSWITCH, SPDT, SIM ROLLER LEVER; Current, contact AC:5A; Force, operating:91.75gf; Travel, pre:16.0mm; Centres, fixing LxW:22.2mm; Temp, op. max:120(degree C); Temp, op. min:-40(degree C); Length / Height, external:9.25mm; Width, RoHS Compliant: Yes
DS2251T-128-16 CONNECTOR ACCESSORY
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