參數(shù)資料
型號: DS21FT44+
廠商: Maxim Integrated Products
文件頁數(shù): 104/117頁
文件大?。?/td> 0K
描述: IC FRAMER 4X4 16CH 300-BGA
產(chǎn)品培訓模塊: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標準包裝: 40
控制器類型: E1 調(diào)幀器
接口: 并行/串行
電源電壓: 2.97 V ~ 3.63 V
電流 - 電源: 225mA
工作溫度: 0°C ~ 70°C
安裝類型: 表面貼裝
封裝/外殼: 300-BBGA
供應(yīng)商設(shè)備封裝: 300-PBGA(27x27)
包裝: 管件
DS21FT44/DS21FF44
87 of 117
Figure 21-2. TAP CONTROLLER STATE MACHINE
21.3. INSTRUCTION REGISTER AND INSTRUCTIONS
The instruction register contains a shift register as well as a latched parallel output and is 3 bits in length.
When the TAP controller enters the Shift-IR state, the instruction shift register will be connected between
JTDI and JTDO. While in the Shift-IR state, a rising edge on JTCLK with JTMS low will shift the data
one stage towards the serial output at JTDO. A rising edge on JTCLK in the Exit1-IR state or the Exit2-
IR state with JTMS high will move the controller to the Update-IR state The falling edge of that same
JTCLK will latch the data in the instruction shift register to the instruction parallel output. Instructions
supported by the DS21Q44 with their respective operational binary codes are shown in Table 21-1.
Table 21-1. INSTRUCTION CODES FOR THE DS21Q44 IEEE 1149.1
ARCHITECTURE
INSTRUCTION
SELECTED REGISTER
INSTRUCTION CODE
SAMPLE/PRELOAD
Boundary Scan
010
BYPASS
Bypass
111
EXTEST
Boundary Scan
000
CLAMP
Boundary Scan
011
HIGHZ
Boundary Scan
100
IDCODE
Device Identification
001
1
0
1
11
1
11
1
00
0
1
0
1
0
Select
DR-Scan
Capture DR
Shift DR
Exit DR
Pause DR
Exit2 DR
Update DR
Select
IR-Scan
Capture IR
Shift IR
Exit IR
Pause IR
Exit2 IR
Update IR
Test Logic
Reset
Run Test/
Idle
0
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