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參數(shù)資料
| 型號： | DS2143 |
| 英文描述： | E1/ISDN-PRI framing transceiver |
| 中文描述： | E1控制器 |
| 文件頁數(shù)： | 8/44頁 |
| 文件大?。?/td> | 552K |
| 代理商： | DS2143 |
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DS2143/DS2143Q
8 of 44
ADDRESS
A7 to A0
01001101
HEX
R/W
REGISTER
NAME
Transmit
Signaling
Register 14.
Transmit
Signaling
Register 15.
Transmit
Signaling
Register 16.
4D
R/W
01001110
4E
R/W
01001111
4F
R/W
Note: All values indicated within the Address
column are hexadecimal.
2.0 PARALLEL PORT
The DS2143 is controlled via a multiplexed bidirectional address/data bus by an external microcontroller
or microprocessor. The DS2143 can operate with either Intel or Motorola bus timing configurations. If
the BTS pin is tied low, Intel timing will be selected; if tied high, Motorola timing will be selected. All
Motorola bus signals are listed in parentheses (). See the timing diagrams in the AC Electrical
Characteristics for more details. The multiplexed bus on the DS2143 saves pins because the address
information and data information share the same signal paths. The addresses are presented to the pins in
the first portion of the bus cycle and data will be transferred on the pins during second portion of the bus
cycle. Addresses must be valid prior to the falling edge of ALE(AS), at which time the DS2143 latches
the address from the AD0 to AD7 pins. Valid write data must be present and held stable during the later
portion of the DS or
WR
pulses. In a read cycle, the DS2143 outputs a byte of data during the latter
portion of the DS or
RD
pulses. The read cycle is terminated and the bus returns to a high impedance
state as
RD
transitions high in Intel timing or as DS transitions low in Motorola timing.
3.0 CONTROL AND TEST REGISTERS
The operation of the DS2143 is configured via a set of five registers. Typically, the control registers are
only accessed when the system is first powered up. Once the DS2143 has been initialized, the control
registers will only need to be accessed when there is a change in the system configuration. There are two
Receive Control Registers (RCR1 and RCR2), two Transmit Control Registers (TCR1 and TCR2), and a
Common Control Register (CCR). Each of the five registers is described in this section.
The Test Register at address 15 hex is used by the factory in testing the DS2143. On power-up, the Test
Register should be set to 00 hex in order for the DS2143 to operate properly.
相關PDF資料 |
PDF描述 |
|---|---|
| DS2143Q | E1/ISDN-PRI framing transceiver |
| DS21455 | Quad T1/E1/J1 Transceivers |
| DS21455N | Quad T1/E1/J1 Transceivers |
| DS21458 | Quad T1/E1/J1 Transceivers |
| DS21458N | Quad T1/E1/J1 Transceivers |
相關代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| DS2143N | 功能描述:網(wǎng)絡控制器與處理器 IC E1 Controller w/Elastic Store RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray |
| DS2143Q | 功能描述:網(wǎng)絡控制器與處理器 IC RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray |
| DS2143Q/T&R | 制造商:Maxim Integrated Products 功能描述:IC CONTROLLER E1 5V LP 44-PLCC 制造商:Maxim Integrated Products 功能描述:Network Controller & Processor ICs E1 Controller w/Elastic Store |
| DS2143Q/T&R | 功能描述:網(wǎng)絡控制器與處理器 IC E1 Controller w/Elastic Store RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray |
| DS2143Q+ | 功能描述:網(wǎng)絡控制器與處理器 IC E1 Controller w/Elastic Store RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray |
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