參數(shù)資料
型號: DS21354LN
廠商: Maxim Integrated Products
文件頁數(shù): 61/124頁
文件大?。?/td> 0K
描述: IC TXRX E1 1-CHIP 3.3V 100-LQFP
產(chǎn)品培訓(xùn)模塊: Lead (SnPb) Finish for COTS
產(chǎn)品變化通告: Product Discontinuation 20/Feb/2012
標(biāo)準(zhǔn)包裝: 90
功能: 單芯片收發(fā)器
接口: E1,HDLC
電路數(shù): 1
電源電壓: 3.14 V ~ 3.47 V
電流 - 電源: 75mA
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 100-LQFP
供應(yīng)商設(shè)備封裝: 100-LQFP(14x14)
包裝: 托盤
包括: 遠(yuǎn)程和 AIS 警報(bào)檢測器 / 發(fā)生器
DS21354/DS21554 3.3V/5V E1 Single-Chip Transceivers
41 of 124
CCR5: COMMON CONTROL REGISTER 5 (Address = AA Hex)
(MSB)
(LSB)
LIRST
RESA
TESA
RCM4
RCM3
RCM2
RCM1
RCM0
SYMBOL
POSITION
NAME AND DESCRIPTION
LIRST
CCR5.7
Line Interface Reset. Setting this bit from a zero to a one will initiate an
internal reset that affects the clock recovery state machine and jitter
attenuator. Normally this bit is only toggled on power-up. Must be
cleared and set again for a subsequent reset.
RESA
CCR5.6
Receive Elastic Store Align. Setting this bit from a zero to a one may
force the receive elastic store’s write/read pointers to a minim separation
of half a frame. No action will be taken if the pointer separation is
already greater or equal to half a frame. If pointer separation is less then
half a frame, the command will be executed and data will be disrupted.
Should be toggled after RSYSCLK has been applied and is stable. Must
be cleared and set again for a subsequent align. See Section 12 for
details.
TESA
CCR5.5
Transmit Elastic Store Align. Setting this bit from a zero to a one may
force the transmit elastic store’s write/read pointers to a minim separation
of half a frame. No action will be taken if the pointer separation is
already greater or equal to half a frame. If pointer separation is less then
half a frame, the command will be executed and data will be disrupted.
Should be toggled after TSYSCLK has been applied and is stable. Must
be cleared and set again for a subsequent align. See Section 12 for
details.
RCM4
CCR5.4
Receive Channel Monitor Bit 4. MSB of a channel decode that
determines which receive channel data will appear in the RDS0M
register. See Section 8 for details.
RCM3
CCR5.3
Receive Channel Monitor Bit 3.
RCM2
CCR5.2
Receive Channel Monitor Bit 2.
RCM1
CCR5.1
Receive Channel Monitor Bit 1.
RCM0
CCR5.0
Receive Channel Monitor Bit 0. LSB of the channel decode.
相關(guān)PDF資料
PDF描述
MC56F8256VLF DSC 64K FLASH 60MHZ 48-LQFP
VI-25B-IY-B1 CONVERTER MOD DC/DC 95V 50W
S9S08DZ32F1MLF MCU 32K FLASH MASK AUTO 48-LQFP
S9S08DZ60F1CLC MCU 60K FLASH AUTO 32-LQFP
DS21552GN IC TXRX T1 1-CHIP 5V 100-BGA
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
DS21354LN+ 功能描述:網(wǎng)絡(luò)控制器與處理器 IC 3.3/5V E1 Single Chip Transceiver RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流(最大值):595 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray
DS21372 制造商:DALLAS 制造商全稱:Dallas Semiconductor 功能描述:3.3V Bit Error Rate Tester BERT
DS21372T 功能描述:網(wǎng)絡(luò)控制器與處理器 IC 3.3V Bit Error Rate Tester (BERT) RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流(最大值):595 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray
DS21372T+ 功能描述:網(wǎng)絡(luò)控制器與處理器 IC 3.3V Bit Error Rate Tester (BERT) RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流(最大值):595 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray
DS21372TN 功能描述:網(wǎng)絡(luò)控制器與處理器 IC 3.3V Bit Error Rate Tester (BERT) RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流(最大值):595 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray