參數(shù)資料
型號: DS1923-F5
英文描述: Hygrochron Temperature/Humidity Logger iButton with 8kB Data Log Memory
中文描述: Hygrochron溫度/濕度記錄儀與8KB數(shù)據(jù)記錄存儲器iButton的
文件頁數(shù): 35/52頁
文件大?。?/td> 495K
代理商: DS1923-F5
DS1923: Hygrochron Temperature/Humidity Logger iButton with 8kB Data Log Memory
Indication of Interference
Wait 0.5 seconds, 1-Wire reset, address the device,
repeat Write Scratchpad with the same data, and
check the validity of the CRC16 at the end of the
command flow. Alternatively, use Read Scratchpad to
verify data integrity.
The data read changes to FFh
bytes or all bytes received are
FFh, including the CRC at the
end of the command flow.
The device behaves as if
authorization code or password
was not valid or as if the copy
function would not end.
successful.
The data read changes to all
FFh bytes or all bytes received
are FFh, including the CRC at
the end of the command flow,
despite a valid password.
Wait 0.5 seconds, 1-Wire reset, address the device,
and repeat Stop Mission. Perform a 1-Wire reset,
address the device, read the general Status register at
address 215h and check the MIP-bit. If the MIP-bit is 0,
Stop Mission was successful.
35 of 52
Command
Remedy
Write Scratchpad
The CRC16 at the end of the
command flow reads FFFFh.
Read Scratchpad
Wait 0.5 seconds, 1-Wire reset, address the device,
repeat Read Scratchpad, and check the validity of the
CRC16 at the end of the command flow.
Copy Scratchpad
Wait 0.5 seconds, 1-Wire reset, address the device,
issue Read Scratchpad and check the AA-bit of the
E/S byte. If the AA-bit is set, Copy Scratchpad was
Read Memory with
CRC
Wait 0.5 seconds, 1-Wire reset, address the device,
repeat Read Memory with CRC, and check the validity
of the CRC16 at the end of the memory page.
Stop Mission
The general Status register at
address 215h reads FFh or the
MIP bit is 1 while bits 0, 2, and
5 are 0.
The interference is more likely to be seen with a high sample rate (1 sample every second) and with high-resolution
logging, which can last up to 666ms when both temperature and humidity are recorded. With lower sample rates
interference may hardly be visible at all. In any case, when writing driver software, it is important to know about the
possibility of interference and to take measures to work around it.
1-WIRE BUS SYSTEM
The 1-Wire bus is a system, which has a single bus master and one or more slaves. In all instances the DS1923 is
a slave device. The bus master is typically a microcontroller. The discussion of this bus system is broken down into
three topics: hardware configuration, transaction sequence, and 1-Wire signaling (signal types and timing). The
1-Wire protocol defines bus transactions in terms of the bus state during specific time slots that are initiated on the
falling edge of sync pulses from the bus master. For a more detailed protocol description, refer to Chapter 4 of the
Book of DS19xx iButton Standards
.
HARDWARE CONFIGURATION
The 1-Wire bus has only a single line by definition; it is important that each device on the bus be able to drive it at
the appropriate time. To facilitate this, each device attached to the 1-Wire bus must have open drain or tri-state
outputs. The 1-Wire port of the DS1923 is open-drain with an internal circuit equivalent to that shown in Figure 10.
A multidrop bus consists of a 1-Wire bus with multiple slaves attached. At standard speed the 1-Wire bus has a
maximum data rate of 16.3kbps. The speed can be boosted to 142kbps by activating the Overdrive mode. The
DS1923 is not guaranteed to be fully compliant to the iButton Standard. Its maximum data rate in standard speed
mode is 15.4kbps and 125kbps in Overdrive. The value of the pullup resistor primarily depends on the network size
and load conditions. The DS1923 requires a pullup resistor of maximum 2.2k at any speed.
The idle state for the 1-Wire bus is high. If for any reason a transaction needs to be suspended, the bus MUST be
left in the idle state if the transaction is to resume. If this does not occur and the bus is left low for more than 16μs
(Overdrive speed) or more than 120μs (standard speed), one or more devices on the bus may be reset. Note that
the DS19233 does not quite meet the full 16μs maximum low time of the normal 1-Wire bus Overdrive timing. With
the DS1923 the bus must be left low for no longer than 12μs at Overdrive to ensure that no DS1923 on the 1-Wire
bus performs a reset. The DS1923 communicates properly when used in conjunction with a DS2480B or DS2490
1-Wire driver and adapters that are based on these driver chips.
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