參數(shù)資料
型號(hào): DS1858B-050
廠商: Maxim Integrated Products
文件頁(yè)數(shù): 7/22頁(yè)
文件大?。?/td> 0K
描述: IC RES TEMP 50/50K W/3MON 16-BGA
產(chǎn)品培訓(xùn)模塊: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標(biāo)準(zhǔn)包裝: 810
接片: 256
電阻(歐姆): 50k
電路數(shù): 2
溫度系數(shù): 標(biāo)準(zhǔn)值 50 ppm/°C
存儲(chǔ)器類型: 非易失
接口: I²C(設(shè)備位址)
電源電壓: 3 V ~ 5.5 V
工作溫度: -40°C ~ 95°C
安裝類型: 表面貼裝
封裝/外殼: 16-LBGA,CSPBGA
供應(yīng)商設(shè)備封裝: 16-CSBGA(4x4)
包裝: 托盤
DS1858
Dual Temperature-Controlled
Resistors with Three Monitors
____________________________________________________________________
15
MEMORY
LOCATION
(hex)
EEPROM/
SRAM
R/W
DEFAULT
SETTING
(hex)
NAME OF LOCATION
FUNCTION
4
——
VCClo
This alarm flag goes high when the lower limit
of the VCC setting is violated.
3
——
MON1hi
This alarm flag goes high when the upper limit
of the MON1 setting is violated.
2
——
MON1lo
This alarm flag goes high when the lower limit
of the MON1 setting is violated.
1
——
MON2hi
This alarm flag goes high when the upper limit
of the MON2 setting is violated.
0
——
MON2lo
This alarm flag goes high when the lower limit
of the MON2 setting is violated.
71
SRAM
R
Alarm flags
Bit 7
——
MON3hi
This alarm flag goes high when the upper limit
of the MON3 setting is violated.
6
——
MON3lo
This alarm flag goes high when the lower limit
of the MON3 setting is violated.
5
——
X
4
——
X
3
——
X
2
——
X
1
——
X
0
——
MINT
A mask of all flags located in Table 01 byte
88h determines the value of MINT. MINT is
maskable to 0 if no interrupt is desired by
setting Table 01 byte 88h to 0.
72 to 7E
SRAM
R
00
Reserved
7F
SRAM
R/W
Table select
Bit 7
——
0X
6
——
0X
5
——
0X
4
——
0X
3
——
0X
2
——
0X
1
——
0
——
0
Table select bits
Set bits = 00 to select Table 00, set bits = 01
to select Table 01, set bits = 10 to select
Table 02, set bits = 11 to select Table 03.
Main Device (continued)
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