參數(shù)資料
型號(hào): DS1855E-050+T&R
廠商: Maxim Integrated Products
文件頁(yè)數(shù): 16/21頁(yè)
文件大?。?/td> 0K
描述: IC RES TEMP-CNTRL 10/50K 14TSSOP
產(chǎn)品培訓(xùn)模塊: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標(biāo)準(zhǔn)包裝: 1,000
接片: 100,256
電阻(歐姆): 10k,50k,100k
電路數(shù): 2
溫度系數(shù): 標(biāo)準(zhǔn)值 750 ppm/°C
存儲(chǔ)器類(lèi)型: 非易失
接口: I²C(設(shè)備位址)
電源電壓: 2.7 V ~ 5.5 V
工作溫度: -40°C ~ 85°C
安裝類(lèi)型: 表面貼裝
封裝/外殼: 14-TSSOP(0.173",4.40mm 寬)
供應(yīng)商設(shè)備封裝: 14-TSSOP
包裝: 帶卷 (TR)
DS1855
4 of 21
MEMORY ORGANIZATION
The DS1855’s serial EEPROM is internally organized with 256 words of 1 byte each. Each word requires
an 8-bit address for random word addressing. The byte at address F9h determines the wiper setting for
potentiometer 0, which contains 100 positions. Writing values above 63h to this address sets the wiper to
its uppermost position, but the MSB is ignored. The byte at address F8h determines the wiper setting for
potentiometer 1, which contains 256 positions (00h to FFh). Address locations FAh though FFh are
reserved and should not be written.
MEMORY
LOCATION
NAME OF
MEMORY
LOCATION
FUNCTION OF MEMORY LOCATION
00h – F7h
User Memory
General-purpose user memory.
F8h
Potentiometer 1 Setting Writing to this byte controls the setting of potentiometer 1, a 256-
position pot. Valid settings are 00h to FFh.
F9h
Potentiometer 0 Setting Writing to this byte controls the setting of potentiometer 0, a 100-
position pot. Valid settings are 00h to 63h. MSB is ignored.
FAh
Software Lock
Configuration Byte
The three lower bits in this byte can be used to set write-protection
to the 256-byte memory block.
B2: Writing this bit to a 1 protects the upper page of memory. If
this bit is set, memory locations F8h to FFh are configured for
write-protection.
B1: Writing this bit to a 1 protects the upper block of memory. If
this bit is set, memory locations 80h to F7h are configured for
write-protection. The upper page must be unlocked in order to
modify the locking of this portion of memory.
B0: Writing this bit to a 1 protects the lower block of memory. If
this bit is set, memory locations 00h to 7Fh are configured for
write-protection. The upper page must be unlocked in order to
modify the locking of this portion of memory.
B2 B1 B0
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