VCC—Power-Supply Terminal. The DS1846 will support supp" />
參數(shù)資料
型號(hào): DS1846E-010+T&R
廠商: Maxim Integrated Products
文件頁數(shù): 12/18頁
文件大小: 0K
描述: IC NV TRI-POT MEM MON 20TSSOP
產(chǎn)品培訓(xùn)模塊: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標(biāo)準(zhǔn)包裝: 2,500
接片: 100,256
電阻(歐姆): 10k,100k
電路數(shù): 3
溫度系數(shù): 標(biāo)準(zhǔn)值 750 ppm/°C
存儲(chǔ)器類型: 非易失
接口: 3 線串行(設(shè)備位址)
電源電壓: 4.5 V ~ 5.5 V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 20-TSSOP(0.173",4.40mm 寬)
供應(yīng)商設(shè)備封裝: 20-TSSOP
包裝: 帶卷 (TR)
DS1846
3 of 18
PIN DESCRIPTIONS
VCC—Power-Supply Terminal. The DS1846 will support supply voltages ranging from +4.5V to +5.5V.
GND—Ground Terminal
SDA—2-Wire Serial Data Interface. The serial data pin is for serial data transfer to and from the
DS1846. The pin is open drain and can be wire-ORed with other open-drain or open-collector interfaces.
SCL—2-Wire Serial Clock Interface. The serial clock input is used to clock data into the DS1846 on
rising edges and clock data out on falling edges.
WP—Write Protect. WP must be connected to GND before either the data in memory or potentiometer
wiper settings may be changed. WP is pulled high internally and must be either left open or connected to
VCC if write protection is desired.
A0—Address Input. This input pin specifies the address of the device when used in a multidropped
configuration. As many as two DS1846s may be addressed on a single 2-wire bus.
H0, H1, H2—High-End Terminals of the Potentiometers. For the three potentiometers, it is not
required that these terminals be connected to a potential greater than the low-end terminal of the
potentiometer. Voltage applied to the high end of the potentiometers cannot exceed the power-supply
voltage, VCC, or go below ground.
L0, L1, L2—Low-End Terminals of the Potentiometers. It is not required that these terminals be
connected to a potential less than the high-end terminals of the pot. Voltage applied to the low end of the
potentiometers cannot exceed the power-supply voltage, VCC, or go below ground.
W0, W1, W2—Wipers of the Potentiometers. These pins are the wiper terminals of the potentiometers.
Three bytes in EEPROM memory locations F8h, F9h, and FAh determine each wiper’s setting. Voltage
applied to either wiper terminal cannot exceed the power-supply voltage, VCC, or go below ground.
PBRST
—Pushbutton Reset. This input pin is active low. It acts as the pushbutton reset pin for the
MicroMonitor. Pushbutton reset is pulled high internally.
NMI
—Nonmaskable Interrupt. Active-low signal that is generated to provide for an early power-fail
warning.
IN—NMI Voltage Input. An input voltage below VTP on this input forces the NMI output low. This can
be used with a voltage-divider to set a secondary voltage monitoring level. (See Figure 4.)
RST
—Active-Low Reset Output. This signal provides an output that can be used to reset a
microprocessor.
RST—Active-High Reset Output. This signal provides an output that can be used to reset a
microprocessor.
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