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參數(shù)資料
| 型號： | DS1843D+ |
| 廠商： | Maxim Integrated Products |
| 文件頁數(shù)： | 3/8頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC CIRCUIT SAMPLE-N-HOLD 8-UDFN |
| 產(chǎn)品培訓(xùn)模塊： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 標(biāo)準(zhǔn)包裝： | 1 |
| 類型： | 采樣和保持 |
| 應(yīng)用： | 光纖學(xué)網(wǎng)絡(luò) |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 8-WFDFN |
| 供應(yīng)商設(shè)備封裝： | 8-uDFN（2x2） |
| 包裝： | 管件 |
DS1843
Fast Sample-and-Hold Circuit
_______________________________________________________________________________________
3
Note 1: All voltages are referenced to ground. Currents entering the IC are specified positive and currents exiting the IC are negative.
Note 2: Guaranteed by design.
Note 3: VOUT at the end of the 10s hold time is within specified level of VIN during the sample window; a 50 resistor connected in
series to both VINP and VINN (VINP - VINN = 1V). External capacitance to ground for both VINP and VINN is approximately 10pF.
Note 4: The sampling capacitor must be removed from the input signal before the input signal changes. Therefore, the SEN pin
must be low for a short period of time, tDEL, before the input changes.
Note 5: VOUT at the end of the hold time is within 1% of VIN during the sample window (VINP - VINN = 1V).
Note 6: Voltage step applied across VOUTP to VOUTN through a 5pF capacitor connected to each pin. This models the load presented
by an ADC while it is sampling the DS1843’s output. See the
Output Buffer section. Settled within 1% of initial voltage.
AC ELECTRICAL CHARACTERISTICS
(VCC = +2.97V to +5.5V, TA = -40°C to +85°C, unless otherwise noted.) (See the Timing Diagram.)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
Sample Time Minimum
tS
VOUT is within 0.4dB (Note 3)
300
ns
Delay Time Minimum
tDEL
(Note 4)
10
ns
Output Time
tOUT
Delay from SEN falling edge until valid
output at VOUT to 1% accuracy
2
s
Hold Time
tHOLD
(Note 5)
tOUT
100
s
1V step, DEN = high
2
Output Step Recovery Time
(Note 6)
tREC
3V step, DEN = high or low
3.5
s
Timing Diagram
VINP - VINN
VOUTP - VOUTN
EXTERNAL
ADC DATA
tADC:ST = EXTERNAL ADC SAMPLING TIME.
tADC:CT = EXTERNAL ADC CONVERSION TIME.
DEN IS CONNECTED TO VCC FOR DIFFERENTIAL OUTPUT.
NOTE: THIS TIMING DIAGRAM IS APPLICABLE FOR SINGLE-ENDED AND DIFFERENTIAL OUTPUT CONFIGURATIONS.
SEN
tS
tDEL
tOUT
tADC:ST
DATA VALID
tADC:CT
tREC
tHOLD
VOLTAGE INVALID
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| DS1843D TRL | 制造商:MAXIM 制造商全稱:Maxim Integrated Products 功能描述:Fast Sample-and-Hold Circuit |
| DS1843D+ | 功能描述:采樣&保持放大器 Fast Sample & Hold Circuit RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 捕獲時間:20 us 電源電壓-最大:18 V 最大工作溫度:+ 85 C 最小工作溫度:- 25 C 安裝風(fēng)格: 封裝 / 箱體:SOIC-14 封裝:Tube |
| DS1843D+TRL | 功能描述:采樣&保持放大器 Fast Sample & Hold Circuit RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 捕獲時間:20 us 電源電壓-最大:18 V 最大工作溫度:+ 85 C 最小工作溫度:- 25 C 安裝風(fēng)格: 封裝 / 箱體:SOIC-14 封裝:Tube |
| DS1843K | 功能描述:放大器 IC 開發(fā)工具 Fast Sample & Hold Circuit RoHS:否 制造商:International Rectifier 產(chǎn)品:Demonstration Boards 類型:Power Amplifiers 工具用于評估:IR4302 工作電源電壓:13 V to 23 V |
| DS1844 | 制造商:DALLAS 制造商全稱:Dallas Semiconductor 功能描述:Quad Digital Potentiometer |
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