參數(shù)資料
型號(hào)： DS1543
廠商： Maxim Integrated Products, Inc.
英文描述： 64K NV Timekeeping RAM(64K非易失性計(jì)時(shí) RAM)
中文描述： 計(jì)時(shí)64K的非易失存儲(chǔ)器（64K的非易失性計(jì)時(shí)的RAM）
文件頁(yè)數(shù)： 3/19頁(yè)
文件大?。?/td> 165K
代理商： DS1543
DS1543
070198 3/19
DS1543 OPERATING MODES
Table 1
V
CC
CE
OE
WE
DQ0–DQ7
A0–A12
MODE
POWER
I T l
In Tolerance
V
IH
X
X
HIGH–Z
X
DESELECT
STANDBY
V
IL
X
V
IL
D
IN
A
IN
WRITE
ACTIVE
V
IL
V
IL
V
IH
D
OUT
A
IN
READ
ACTIVE
V
IL
V
IH
V
IH
HIGH–Z
A
IN
READ
ACTIVE
V
BAT
< V
CC
<
X
X
X
HIGH–Z
X
DESELECT
CMOS STANDBY
<V
BAT
X
X
X
HIGH–Z
X
DATA
RETENTION
BATTERY
CURRENT
DATA READ MODE
The DS1543 is in the read mode whenever CE (chip
enable) is low and WE (write enable) is high. The device
architecture allows ripple through access to any valid
address location. Valid data will be available at the DQ
pins within t
AA
after the last address input is stable, pro-
viding that CE and OE access times are satisfied. If CE
or OE access times are not met, valid data will be avail-
able at the latter of chip enable access (t
CEA
) or at out-
put enable access time (t
OEA
). The state of the data
input/output pins (DQ) is controlled by CE and OE. If the
outputs are activated before t
AA
, the data lines are
driven to an intermediate state until t
AA
. If the address
inputs are changed while CE and OE remain valid, out-
put data will remain valid for output data hold time (t
OH
)
but will then go indeterminate until the next address
access.
DATA WRITE MODE
The DS1543 is in the write mode whenever WE and CE
are in their active state. The start of a write is referenced
to the latter occurring transition of WE or CE. The
addresses must be held valid throughout the cycle. CE
and WE must return inactive for a minimum of t
WR
prior
to the initiation of a subsequent read or write cycle. Data
in must be valid t
DS
prior to the end of the write and
remain valid for t
DH
afterward. In a typical application,
the OE signal will be high during a write cycle. However,
OE can be active provided that care is taken with the
data bus to avoid bus contention. If OE is low prior to
WE transitioning low, the data bus can become active
with read data defined by the address inputs. A low tran-
sition on WE will then disable the outputs t
WEZ
after WE
goes active.
DATA RETENTION MODE
The 5 volt device is fully accessible and data can be writ-
ten and read only when V
CC
is greater than V
PF
. How-
ever, when V
CC
is below the power fail point V
PF
(point
at which write protection occurs) the internal clock regis-
ters and SRAM are blocked from any access. When
V
CC
falls below the battery switch point V
SO
(battery
supply level), device power is switched from the V
CC
pin
to the internal backup lithium battery. RTC operation
and SRAM data are maintained from the battery until
V
CC
is returned to nominal levels.
The 3.3 volt device is fully accessible and data can be
written and read only when V
CC
is greater than V
PF
.
When V
CC
falls below V
PF
, access to the device is inhib-
ited. If V
PF
is less than V
BAT
, the device power is
switched from V
CC
to the internal backup lithium battery
when V
CC
drops below V
PF
. If V
PF
is greater than V
BAT
,
the device power is switched from V
CC
to the internal
backup lithium battery when V
CC
drops below V
BAT
.
RTC operation and SRAM data are maintained from the
battery until V
CC
is returned to nominal levels.
All control, data, and address signals must be powered
down when V
CC
is powered down.
BATTERY LONGEVITY
The DS1543 has a lithium power source that is
designed to provide energy for the clock activity, and
clock and RAM data retention when the V
CC
supply is
not present. The capability of this internal power supply
is sufficient to power the DS1543 continuously for the
life of the equipment in which it is installed. For specifi-
cation purposes, the life expectancy is 10 years at 25
°
C
相關(guān)PDF資料
PDF描述
DS1647 Nonvolatile Timekeeping RAM(非易失性計(jì)時(shí)RAM)
DS1647P Nonvolatile Timekeeping RAM(非易失性計(jì)時(shí)RAM)
DS1666 Audio Digital Resistor(音頻數(shù)字電阻器)
DS1666S Audio Digital Resistor(音頻數(shù)字電阻器)
DS1667 Digital Resistor with OP AMP(帶運(yùn)算放大器的數(shù)字電阻器)
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
DS1543-100 功能描述:實(shí)時(shí)時(shí)鐘 RoHS:否 制造商:Microchip Technology 功能:Clock, Calendar. Alarm RTC 總線接口:I2C 日期格式:DW:DM:M:Y 時(shí)間格式:HH:MM:SS RTC 存儲(chǔ)容量:64 B 電源電壓-最大:5.5 V 電源電壓-最小:1.8 V 最大工作溫度:+ 85 C 最小工作溫度: 安裝風(fēng)格:Through Hole 封裝 / 箱體:PDIP-8 封裝:Tube
DS1543-100+ 功能描述:實(shí)時(shí)時(shí)鐘 RoHS:否 制造商:Microchip Technology 功能:Clock, Calendar. Alarm RTC 總線接口:I2C 日期格式:DW:DM:M:Y 時(shí)間格式:HH:MM:SS RTC 存儲(chǔ)容量:64 B 電源電壓-最大:5.5 V 電源電壓-最小:1.8 V 最大工作溫度:+ 85 C 最小工作溫度: 安裝風(fēng)格:Through Hole 封裝 / 箱體:PDIP-8 封裝:Tube
DS1543-70 功能描述:實(shí)時(shí)時(shí)鐘 RoHS:否 制造商:Microchip Technology 功能:Clock, Calendar. Alarm RTC 總線接口:I2C 日期格式:DW:DM:M:Y 時(shí)間格式:HH:MM:SS RTC 存儲(chǔ)容量:64 B 電源電壓-最大:5.5 V 電源電壓-最小:1.8 V 最大工作溫度:+ 85 C 最小工作溫度: 安裝風(fēng)格:Through Hole 封裝 / 箱體:PDIP-8 封裝:Tube
DS1543-85 功能描述:實(shí)時(shí)時(shí)鐘 RoHS:否 制造商:Microchip Technology 功能:Clock, Calendar. Alarm RTC 總線接口:I2C 日期格式:DW:DM:M:Y 時(shí)間格式:HH:MM:SS RTC 存儲(chǔ)容量:64 B 電源電壓-最大:5.5 V 電源電壓-最小:1.8 V 最大工作溫度:+ 85 C 最小工作溫度: 安裝風(fēng)格:Through Hole 封裝 / 箱體:PDIP-8 封裝:Tube
DS1543-85+ 功能描述:實(shí)時(shí)時(shí)鐘 RoHS:否 制造商:Microchip Technology 功能:Clock, Calendar. Alarm RTC 總線接口:I2C 日期格式:DW:DM:M:Y 時(shí)間格式:HH:MM:SS RTC 存儲(chǔ)容量:64 B 電源電壓-最大:5.5 V 電源電壓-最小:1.8 V 最大工作溫度:+ 85 C 最小工作溫度: 安裝風(fēng)格:Through Hole 封裝 / 箱體:PDIP-8 封裝:Tube
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。

采購(gòu)需求

(若只采購(gòu)一條型號(hào)，填寫(xiě)一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

*型號(hào) *數(shù)量 廠商 批號(hào) 封裝
添加更多采購(gòu)

我的聯(lián)系方式

*
*
*