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參數(shù)資料
| 型號(hào)： | DS1486P |
| 廠商： | Maxim Integrated Products, Inc. |
| 英文描述： | RAMified Watchdog Timekeeper(RAM化的看門狗計(jì)時(shí)器) |
| 中文描述： | RAMified看門狗計(jì)時(shí)器 |
| 文件頁數(shù)： | 12/16頁 |
| 文件大小： | 174K |
| 代理商： | DS1486P |
DS1486P
070298 12/16
AC ELECTRICAL CHARACTERISTICS POWER–UP POWER–DOWN TIMING
(0
°
C to 70
°
C)
PARAMETER
SYMBOL
MIN
MAX
UNITS
NOTES
CE High to Power Fail
t
PF
0
ns
Recovery at Power Up
t
REC
200
ms
V
CC
Slew Rate
Power Down
t
F
4.0<V
CC
<4.5V
300
μ
s
V
Slew Rate
Power Down
t
FB
3.0<V
CC
<4.25V
10
μ
s
V
CC
Slew Rate
Power Up
t
R
4.5V>V
CC
>4.0V
0
μ
s
Expected Data Retention
t
DR
10
years
9
WARNING:
Under no circumstances are negative undershoots, of any amplitude, allowed when device is in battery backup mode.
NOTES:
1. WE is high for a read cycle.
2. OE = V
IH
or V
IL
. If OE = V
IH
during write cycle, the output buffers remain in a high impedance state.
3. t
WP
is specified as the logical AND of the CE and WE. t
WP
is measured from the latter of CE or WE going low
to the earlier of CE or WE going high.
4. t
DS
or t
DH
are measured from the earlier of CE or WE going high.
5. t
DH
is measured from WE going high. If CE is used to terminate the write cycle, then t
DH
= 20 ns for –120 parts
and t
DH
= –25 ns for –150 parts.
6. If the CE low transition occurs simultaneously with or later than the WE low transition in Write Cycle 1, the output
buffers remain in a high impedance state during this period.
7. If the CE high transition occurs prior to or simultaneously with the WE high transition, the output buffers remain
in a high impedance state during this period.
8. If WE is low or the WE low transition occurs prior to or simultaneously with the CE low transition, the output buffers
remain in a high impedance state during this period.
9. Each DS1486 is marked with a four digit date code AABB. AA designates the year of manufacture. BB designates
the week of manufacture. The expected t
DR
is defined for DIP Modules as starting at the date of manufacture.
10.All voltages are referenced to ground.
11. Applies to both interrupt pins when the alarms are set to pulse.
12.Interrupt output occurs within 100 ns on the alarm condition existing.
13.Both INTA and INTB(INTB) are open drain outputs.
14.Real–Time Clock Modules (DIP) can be successfully processed through conventional wave–soldering tech-
niques as long as temperature exposure to the lithium energy source contained within does not exceed +85
°
C.
Post solder cleaning with water washing techniques is acceptable, provided that ultrasonic vibration is not used.
In addition, for the PowerCap version:
a. Dallas Semiconductor recommends that PowerCap Module bases experience one pass through solder
reflow oriented with the label side up (“l(fā)ive – bug”).
b. Hand Soldering and touch – up: Do not touch or apply the soldering iron to leads for more than 3 (three)
seconds. To solder, apply flux to the pad, heat the lead frame pad and apply solder. To remove the part,
apply flux, heat the lead frame pad until the solder reflows and use a solder wick to remove solder.
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參數(shù)描述 |
|---|---|
| DS1486P-120 | 功能描述:實(shí)時(shí)時(shí)鐘 RoHS:否 制造商:Microchip Technology 功能:Clock, Calendar. Alarm RTC 總線接口:I2C 日期格式:DW:DM:M:Y 時(shí)間格式:HH:MM:SS RTC 存儲(chǔ)容量:64 B 電源電壓-最大:5.5 V 電源電壓-最小:1.8 V 最大工作溫度:+ 85 C 最小工作溫度: 安裝風(fēng)格:Through Hole 封裝 / 箱體:PDIP-8 封裝:Tube |
| DS1486P-120+ | 功能描述:實(shí)時(shí)時(shí)鐘 RoHS:否 制造商:Microchip Technology 功能:Clock, Calendar. Alarm RTC 總線接口:I2C 日期格式:DW:DM:M:Y 時(shí)間格式:HH:MM:SS RTC 存儲(chǔ)容量:64 B 電源電壓-最大:5.5 V 電源電壓-最小:1.8 V 最大工作溫度:+ 85 C 最小工作溫度: 安裝風(fēng)格:Through Hole 封裝 / 箱體:PDIP-8 封裝:Tube |
| DS1486P-150 | 制造商:DALLAS 制造商全稱:Dallas Semiconductor 功能描述:RAMified Watchdog Timekeeper |
| DS1487 | 制造商:NSC 制造商全稱:National Semiconductor 功能描述:Low Power RS-485 1⁄4 Unit Load Multipoint Transceiver |
| DS1487M | 功能描述:RS-422/RS-485 接口 IC RoHS:否 制造商:Maxim Integrated 數(shù)據(jù)速率:1136 Kbps 工作電源電壓:3 V to 5.5 V 電源電流:5.9 mA 工作溫度范圍:- 40 C to + 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:SOIC-28 封裝:Tube |
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