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參數(shù)資料
| 型號： | DS1258AB-70 |
| 廠商： | MAXIM INTEGRATED PRODUCTS INC |
| 元件分類： | Static RAM |
| 英文描述： | 128K X 16 NON-VOLATILE SRAM MODULE, 70 ns, DMA40 |
| 封裝： | 0.740 INCH, DIP-40 |
| 文件頁數(shù)： | 2/8頁 |
| 文件大?。?/td> | 201K |
| 代理商： | DS1258AB-70 |
DS1258Y/AB
2 of 8
READ MODE
The DS1258 devices execute a read cycle whenever WE (Write Enable) is inactive (high) and either/both
of CEU or CEL (Chip Enables) are active (low) and OE (Output Enable) is active (low). The unique
address specified by the 17 address inputs (A0-A16) defines which of the 131,072 words of data is
accessed. The status of CEU and CEL determines whether all or part of the addressed word is accessed. If
CEU
is active with CEL inactive, then only the upper byte of the addressed word is accessed. If CEU is
inactive with CEL active, then only the lower byte of the addressed word is accessed. If both the CEU
and CEL inputs are active (low), then the entire 16-bit word is accessed. Valid data will be available to
the 16 data output drivers within tACC (Access Time) after the last address input signal is stable, providing
that CEU , CEL and OE access times are also satisfied. If CEU , CEL , and OE access times are not
satisfied, then data access must be measured from the later occurring signal, and the limiting parameter is
either tCO for CEU , CEL , or tOE for OE rather than address access.
WRITE MODE
The DS1258 devices execute a write cycle whenever WE and either/both of CEU or CEL are active (low)
after address inputs are stable. The unique address specified by the 17 address inputs (A0-A16) defines
which of the 131,072 words of data is accessed. The status of CEU and CEL determines whether all or
part of the addressed word is accessed. If CEU is active with CEL inactive, then only the upper byte of
the addressed word is accessed. If CEU is inactive with CEL active, then only the lower byte of the
addressed word is accessed. If both the CEU and CEL inputs are active (low), then the entire 16-bit word
is accessed. The write cycle is terminated by the earlier rising edge of CEU and/or CEL , or WE . All
address inputs must be kept valid throughout the write cycle. WE must return to the high state for a
minimum recovery time (tWR) before another cycle can be initiated. The OE control signal should be kept
inactive (high) during write cycles to avoid bus contention. However, if the output drivers are enabled
( CEU and/or CEL , and OE active) then WE will disable the outputs in tODW from its falling edge.
READ/WRITE FUNCTION Table 1
OE
WE
CEL
CEU
VCC
CURRENT
DQ0-DQ7
DQ8-DQ15
CYCLE
PERFORMED
H
X
ICCO
High-Z
Output Disabled
L
H
L
Output
L
H
L
H
Output
High-Z
L
H
L
ICCO
High-Z
Output
Read Cycle
X
L
Input
X
L
H
Input
High-Z
X
L
H
L
ICCO
High-Z
Input
Write Cycle
X
H
ICCS
High-Z
Output Disabled
DATA RETENTION MODE
The DS1258AB provides full functional capability for VCC greater than 4.75V, and write protects by
4.5V. The DS1258Y provides full functional capability for VCC greater than 4.5V and write protects by
4.25V. Data is maintained in the absence of VCC without any additional support circuitry. The NV static
RAMs constantly monitor VCC. Should the supply voltage decay, the NV SRAMs automatically write
protect themselves, all inputs become “don’t care,” and all outputs become high impedance. As VCC falls
below approximately 3.0V, a power switching circuit connects the lithium energy source to RAM to
相關PDF資料 |
PDF描述 |
|---|---|
| DS1258AB-100 | 128K X 16 NON-VOLATILE SRAM MODULE, 100 ns, DMA40 |
| DS1258AB | 128K X 16 NON-VOLATILE SRAM MODULE, 70 ns, PDIP40 |
| DS1258Y | 128K X 16 NON-VOLATILE SRAM MODULE, 70 ns, PDIP40 |
| DS1258W-150 | 128K X 16 NON-VOLATILE SRAM MODULE, 150 ns, DMA40 |
| DS1258W | 128K X 16 NON-VOLATILE SRAM MODULE, 150 ns, PDIP40 |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| DS1258AB-70# | 功能描述:NVRAM RoHS:否 制造商:Maxim Integrated 數(shù)據(jù)總線寬度:8 bit 存儲容量:1024 Kbit 組織:128 K x 8 接口類型:Parallel 訪問時間:70 ns 電源電壓-最大:5.5 V 電源電壓-最小:4.5 V 工作電流:85 mA 最大工作溫度:+ 70 C 最小工作溫度:0 C 封裝 / 箱體:EDIP 封裝:Tube |
| DS1258AB-70IND | 功能描述:NVRAM RoHS:否 制造商:Maxim Integrated 數(shù)據(jù)總線寬度:8 bit 存儲容量:1024 Kbit 組織:128 K x 8 接口類型:Parallel 訪問時間:70 ns 電源電壓-最大:5.5 V 電源電壓-最小:4.5 V 工作電流:85 mA 最大工作溫度:+ 70 C 最小工作溫度:0 C 封裝 / 箱體:EDIP 封裝:Tube |
| DS1258AB-70-IND | 制造商:DALLAS 制造商全稱:Dallas Semiconductor 功能描述:128k x 16 Nonvolatile SRAM |
| DS1258AB-70IND# | 功能描述:NVRAM RoHS:否 制造商:Maxim Integrated 數(shù)據(jù)總線寬度:8 bit 存儲容量:1024 Kbit 組織:128 K x 8 接口類型:Parallel 訪問時間:70 ns 電源電壓-最大:5.5 V 電源電壓-最小:4.5 V 工作電流:85 mA 最大工作溫度:+ 70 C 最小工作溫度:0 C 封裝 / 箱體:EDIP 封裝:Tube |
| DS1258W | 制造商:DALLAS 制造商全稱:Dallas Semiconductor 功能描述:3.3V 128k x 16 Nonvolatile |
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