參數(shù)資料
型號(hào): DS1248Y
廠商: Maxim Integrated Products, Inc.
英文描述: Using the Dallas Phantom Real Time Clocks(帶幻象實(shí)時(shí)時(shí)鐘的NVSRAM)
中文描述: 使用達(dá)拉斯幻影實(shí)時(shí)時(shí)鐘(帶幻象實(shí)時(shí)時(shí)鐘的非易失性SRAM)
文件頁(yè)數(shù): 3/12頁(yè)
文件大?。?/td> 91K
代理商: DS1248Y
DS1248Y
022798 3/12
PHANTOM CLOCK
REGISTER INFORMATION
The Phantom Clock information is contained in 8 regis-
ters of 8 bits, each of which is sequentially accessed one
bit at a time after the 64–bit pattern recognition se-
quence has been completed. When updating the Phan-
tom Clock registers, each register must be handled in
groups of 8 bits. Writing and reading individual bits with-
in a register could produce erroneous results. These
read/write registers are defined in Figure 2.
Data contained in the Phantom Clock register is in
binary coded decimal format (BCD). Reading and writ-
ing the registers is always accomplished by stepping
through all 8 registers, starting with bit 0 of register 0 and
ending with bit 7 of register 7.
PHANTOM CLOCK REGISTER DEFINITION
Figure 1
7
6
5
4
3
2
1
0
1
1
0
0
0
1
0
1
0
0
1
1
1
0
1
0
1
0
1
0
0
0
1
1
0
1
0
1
1
1
0
0
1
1
0
0
0
1
0
1
0
0
1
1
1
0
1
0
1
0
1
0
0
0
1
1
0
1
0
1
1
1
0
0
C5
3A
A3
5C
C5
3A
A3
5C
BYTE 0
BYTE 1
BYTE 2
BYTE 3
BYTE 4
BYTE 5
BYTE 6
BYTE 7
HEX
VALUE
NOTE:
The pattern recognition in Hex is C5, 3A, A3, 5C, C5, 3A, A3, 5C. The odds of this pattern being accidentally dupli-
cated and causing inadvertent entry to the Phantom Clock is less than 1 in 10
19
. This pattern is sent to the Phantom
Clock LSB to MSB.
相關(guān)PDF資料
PDF描述
DS1249AB 2048K Nonvolatile SRAM(2048K 非易失性靜態(tài)RAM)
DS1249Y 2048K Nonvolatile SRAM(2048K 非易失性靜態(tài)RAM)
DS1267 Dual Digital Potentiometer Chip(雙路數(shù)字電位器芯片)
DS1280 3-Wire to Bytewide Converter Chip(3線(xiàn)至字節(jié)寬度(8位)轉(zhuǎn)換芯片)
DS1284 Watchdog Timekeeper Chip(看門(mén)狗計(jì)時(shí)器芯片)
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