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參數(shù)資料
| 型號： | DS1245AB |
| 廠商： | MAXIM INTEGRATED PRODUCTS INC |
| 元件分類： | DRAM |
| 英文描述： | 1024K Nonvolatile SRAM(1024K 非易失性靜態(tài)RAM) |
| 中文描述： | 128K X 8 NON-VOLATILE SRAM MODULE, 70 ns, DMA32 |
| 文件頁數(shù)： | 8/12頁 |
| 文件大?。?/td> | 119K |
| 代理商： | DS1245AB |
DS1245Y/AB
042398 8/12
POWER–DOWN/POWER–UP TIMING
(t
A
: See Note 10)
UNITS
PARAMETER
SYMBOL
MIN
TYP
MAX
NOTES
CE, WE at V
IH
before
Power–Down
t
PD
0
μ
s
11
V
CC
slew from V
TP
to 0V (CE at
V
IH)
t
F
300
μ
s
V
CC
slew from 0V to V
TP
(CE at
V
IH)
t
R
300
μ
s
CE, WE at V
IH
after Power–Up
t
REC
2
125
ms
(t
A
= 25
°
C)
NOTES
PARAMETER
SYMBOL
MIN
TYP
MAX
UNITS
Expected Data Retention Time
t
DR
10
years
9
WARNING:
Under no circumstance are negative undershoots, of any amplitude, allowed when device is in battery backup mode.
NOTES:
1. WE is high for a Read Cycle.
2. OE = V
IH
or V
IL
. If OE = V
IH
during write cycle, the output buffers remain in a high impedance state.
3. t
WP
is specified as the logical AND of CE and WE. t
WP
is measured from the latter of CE or WE going low to the
earlier of CE or WE going high.
4. t
DH
, t
DS
are measured from the earlier of CE or WE going high.
5. These parameters are sampled with a 5 pF load and are not 100% tested.
6. If the CE low transition occurs simultaneously with or latter than the WE low transition, the output buffers remain
in a high impedance state during this period.
7. If the CE high transition occurs prior to or simultaneously with the WE high transition, the output buffers remain
in high impedance state during this period.
8. If WE is low or the WE low transition occurs prior to or simultaneously with the CE low transition, the output buffers
remain in a high impedance state during this period.
9. Each DS1245 has a built–in switch that disconnects the lithium source until V
CC
is first applied by the user. The
expected t
DR
is defined as accumulative time in the absence of V
CC
starting from the time power is first applied
by the user.
10.All AC and DC electrical characteristics are valid over the full operating temperature range. For commercial prod-
ucts, this range is 0
°
C to 70
°
C. For industrial products (IND), this range is –40
°
C to +85
°
C.
11. In a power–down condition the voltage on any pin may not exceed the voltage on V
CC
.
12.t
WR1
and t
DH1
are measured from WE going high.
13.t
WR2
and t
DH2
are measured from CE going high.
14.DS1245 DIP modules are recognized by Underwriters Laboratory (U.L.
) under file E99151. DS1245 PowerCap
modules are pending U.L. review. Contact the factory for status.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| DS1245AB-100 | 功能描述:NVRAM 1024K SRAM Nonvolatile RoHS:否 制造商:Maxim Integrated 數(shù)據(jù)總線寬度:8 bit 存儲容量:1024 Kbit 組織:128 K x 8 接口類型:Parallel 訪問時間:70 ns 電源電壓-最大:5.5 V 電源電壓-最小:4.5 V 工作電流:85 mA 最大工作溫度:+ 70 C 最小工作溫度:0 C 封裝 / 箱體:EDIP 封裝:Tube |
| DS1245AB-100+ | 功能描述:NVRAM 1024K SRAM Nonvolatile RoHS:否 制造商:Maxim Integrated 數(shù)據(jù)總線寬度:8 bit 存儲容量:1024 Kbit 組織:128 K x 8 接口類型:Parallel 訪問時間:70 ns 電源電壓-最大:5.5 V 電源電壓-最小:4.5 V 工作電流:85 mA 最大工作溫度:+ 70 C 最小工作溫度:0 C 封裝 / 箱體:EDIP 封裝:Tube |
| DS1245AB-100-IND | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:NVRAM (Battery Based) |
| DS1245AB-120 | 功能描述:NVRAM RoHS:否 制造商:Maxim Integrated 數(shù)據(jù)總線寬度:8 bit 存儲容量:1024 Kbit 組織:128 K x 8 接口類型:Parallel 訪問時間:70 ns 電源電壓-最大:5.5 V 電源電壓-最小:4.5 V 工作電流:85 mA 最大工作溫度:+ 70 C 最小工作溫度:0 C 封裝 / 箱體:EDIP 封裝:Tube |
| DS1245AB-120+ | 功能描述:NVRAM 1024K SRAM Nonvolatile RoHS:否 制造商:Maxim Integrated 數(shù)據(jù)總線寬度:8 bit 存儲容量:1024 Kbit 組織:128 K x 8 接口類型:Parallel 訪問時間:70 ns 電源電壓-最大:5.5 V 電源電壓-最小:4.5 V 工作電流:85 mA 最大工作溫度:+ 70 C 最小工作溫度:0 C 封裝 / 箱體:EDIP 封裝:Tube |
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