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參數(shù)資料
型號: DS1023S-50/T&R
廠商: Maxim Integrated Products
文件頁數(shù): 2/16頁
文件大?。?/td> 0K
描述: IC DELAY LINE 256TAP 16-SOIC
產(chǎn)品培訓(xùn)模塊: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標(biāo)準(zhǔn)包裝: 1,000
標(biāo)片/步級數(shù): 256
功能: 單發(fā)射,可編程
延遲到第一抽頭: 16.5ns
接頭增量: 0.5ns
可用的總延遲: 127.5ns
獨(dú)立延遲數(shù): 1
電源電壓: 4.75 V ~ 5.25 V
工作溫度: 0°C ~ 70°C
安裝類型: 表面貼裝
封裝/外殼: 16-SOIC(0.295",7.50mm 寬)
供應(yīng)商設(shè)備封裝: 16-SOIC W
包裝: 帶卷 (TR)
DS1023
10 of 16
TIMING DIAGRAM: SILICON DELAY LINE Figure 9
AC ELECTRICAL CHARACTERISTICS -
DS1023-25 Delay Specifications
(TA = 0
°C to 70°C; VCC = 5V ± 5%)
PARAMETER
SYMBOL
MIN
TYP
MAX
UNITS
NOTES
Step Zero Delay
-absolute
-wrt REF
tD0
tDREF0
-2
16.5
-1.5
22
0
ns
1, 13
2, 14
Reference Delay
tREF
18
22
ns
3, 13
Delay Step Size
tSTEP
0
0.25
0.75
ns
4, 16
Maximum Delay
-absolute
-wrt REF
tDMAX
tDREF
75
60
80
63.75
89
67.5
ns
5, 13
6, 14
Integral Non-linearity
(deviation from straight line)
terr
-1
0
+1
ns
7
OUT
Delta Delay
tINV0
0
1
2
ns
8
IN High to PWM High
tPWM0
16.5
22
ns
9, 13
Minimum PWM Output
Pulse Width
tPWM
5
ns
10
Minimum Input Pulse Width
tWI
20
ns
11
Minimum Input Period
40
ns
12
Input Rise and Fall Times
tr, tf
0
1
ms
15
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