參數(shù)資料
型號(hào): DS1023S-25/T&R
廠商: Maxim Integrated Products
文件頁數(shù): 15/16頁
文件大?。?/td> 0K
描述: IC DELAY LINE 256TAP 16-SOIC
產(chǎn)品培訓(xùn)模塊: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標(biāo)準(zhǔn)包裝: 1,000
標(biāo)片/步級(jí)數(shù): 256
功能: 單發(fā)射,可編程
延遲到第一抽頭: 16.5ns
接頭增量: 0.25ns
可用的總延遲: 63.75ns
獨(dú)立延遲數(shù): 1
電源電壓: 4.75 V ~ 5.25 V
工作溫度: 0°C ~ 70°C
安裝類型: 表面貼裝
封裝/外殼: 16-SOIC(0.295",7.50mm 寬)
供應(yīng)商設(shè)備封裝: 16-SOIC W
包裝: 帶卷 (TR)
DS1023
8 of 16
DALLAS SEMICONDUCTOR TEST CIRCUIT Figure 8
TEST SETUP DESCRIPTION
Figure 8 illustrates the hardware configuration used for measuring the timing parameters of the DS1023.
The input waveform is produced by a precision pulse generator under software control. Time delays are
measured by a time interval counter (20 ps resolution) connected to the output. The DS1023 serial and
parallel ports are controlled by interfaces to a central computer. All measurements are fully automated
with each instrument controlled by the computer over an IEEE 488 bus.
TEST CONDITIONS
INPUT:
Ambient Temperature:
25
°C ± 3°C
Supply Voltage (VCC):
5.0V
± 0.1V
Input Pulse:
High = 3.0V
± 0.1V
Low = 0.0V
± 0.1V
Source Impedance:
50 ohms max.
Rise and Fall Time:
3.0 ns max.
(measured between
0.6V and 2.4V)
Pulse Width:
500 ns
Period:
1
ms
NOTE: Above conditions are for test only and do not restrict the operation of the device under other data
sheet conditions.
OUTPUT:
Output is loaded with a 74F04. Delay is measured between the 1.5V level of the rising edge of the input
signal and the 1.5V level of the corresponding edge of the output.
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