參數(shù)資料
型號: DS1023S-500
廠商: Maxim Integrated Products
文件頁數(shù): 1/16頁
文件大?。?/td> 0K
描述: IC DELAY LINE 256TAP 16-SOIC
產(chǎn)品培訓模塊: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標準包裝: 45
標片/步級數(shù): 256
功能: 單發(fā)射,可編程
延遲到第一抽頭: 16.5ns
接頭增量: 5ns
可用的總延遲: 1275ns
獨立延遲數(shù): 1
電源電壓: 4.75 V ~ 5.25 V
工作溫度: 0°C ~ 70°C
安裝類型: 表面貼裝
封裝/外殼: 16-SOIC(0.295",7.50mm 寬)
供應商設備封裝: 16-SOIC W
包裝: 管件
1 of 16
070505
FEATURES
§ Step sizes of 0.25 ns, 0.5 ns, 1 ns, 2 ns, 5 ns
§ On-chip reference delay
§ Configurable as delay line, pulse width
modulator, or free-running oscillator
§ Can delay clocks by a full period or more
§ Guaranteed monotonicity
§ Parallel or serial programming
§ Single 5V supply
§ 16-pin DIP or SOIC package
PIN ASSIGNMENT
PIN DESCRIPTION
IN
- Input
P0/Q
- Parallel Input P0 (parallel mode)
- Serial Data Output (serial mode)
P1/CLK
- Parallel Input P1 (parallel mode)
- Serial Input Clock (serial mode)
P2/D
- Parallel Input P2 (parallel mode)
- Serial Data Input (serial mode)
P3 - P7
- Remaining Parallel Inputs
GND
- Ground
OUT/ OUT
- Output
REF/PWM
- Reference or PWM Output
P
/S
- Parallel / Serial Programming
Select
MS
- Output Mode Select
LE
- Input Latch Enable
VCC
- Supply Voltage
DESCRIPTION
The DS1023 is an 8-bit programmable delay line similar in function to the DS1020/DS1021.
Additional features have been added to extend the range of applications:
The internal delay line architecture has been revised to allow clock signals to be delayed by up to a full
period or more. Combined with an on-chip reference delay (to offset the inherent or “step zero” delay of
the device) clock phase can now be varied over the full 0-360 degree range.
DS1023
8-Bit Programmable Timing Element
www.maxim-ic.com
IN
LE
Q/P0
CLK/P1
D/P2
P3
P4
GND
16
15
14
13
12
11
10
9
VCC
OUT/OUT
REF/PWM
P/S
P7
P6
MS
P5
1
2
3
4
5
6
7
8
DS1023 300-mil DIP
DS1023S 300-mil SOIC
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相關代理商/技術參數(shù)
參數(shù)描述
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