參數(shù)資料
型號： DRV101T
英文描述： PWM SOLENOID/VALVE DRIVER
中文描述： 脈寬調(diào)制電磁/閥驅(qū)動
文件頁數(shù)： 2/19頁
文件大?。?/td> 298K
代理商： DRV101T
2
DRV101
SPECIFICATIONS
At T
C
= +25
°
C, V
S
= +24V, Load = 100
|| 1000pF, and 4.99k
Flag pullup to +5V, unless otherwise noted.
DRV101T, F
PARAMETER
COMMENTS
MIN
TYP
MAX
UNITS
OUTPUT
Output Saturation Voltage, Sink
I
O
= 1A
I
O
= 0.1A
+0.8
+0.2
2.3
23
±
0.01
+1
+0.3
3
V
V
A
Current Limit
Under-Scale Current
(1)
Leakage Current
1.9
mA
mA
Output Transistor Off, V
S
= V
O
= +60V
±
1
DIGITAL CONTROL INPUT
(2)
V
CTR
Low (output disabled)
V
CTR
High (output enabled)
I
CTR
Low (output disabled)
I
CTR
High (output enabled)
Propagation Delay
0
+1.2
+5.5
V
V
μ
A
μ
A
μ
s
+2.2
V
CTR
= 0V
V
CTR
= +5V
–80
20
2
On-to-Off and Off-to-On
DELAY TO PWM
(3)
Delay Equation
(4)
Delay Time
Minimum Delay Time
(5)
dc to PWM Mode
Delay to PWM
≈
C
D
10
6
(C
D
in F)
80
95
15
s
C
D
= 0.1
μ
F
C
D
= 0
110
ms
μ
s
DUTY CYCLE ADJUST
Duty Cycle Range
Duty Cycle Accuracy
vs Supply Voltage
Nonlinearity
(6)
10 to 90
±
2
±
1
2
%
%
%
50% Duty Cycle, R
PWM
= 28.7k
50% Duty Cycle, V
S
= V
O
= +9V to +60V
10% to 80% Duty Cycle
±
5
±
5
% FSR
DYNAMIC RESPONSE
Output Voltage Rise Time
Output Voltage Fall Time
Oscillator Frequency
V
O
= 10% to 90% of V
S
V
O
= 90% to 10% of V
S
1
2.5
2.5
29
μ
s
μ
s
kHz
0.1
24
19
FLAG
Normal Operation
Fault
(7)
Sink Current
Under-Current Flag: Set
20k
Pull-Up to +5V, I
O
< 1.5A
Sinking 1mA
V
FLAG
= 0.4V
+4
+4.9
+0.2
2
4
2
2
2
V
V
+0.8
mA
μ
s
μ
s
μ
s
μ
s
Reset
Set
Reset
Over-Current Flag:
THERMAL SHUTDOWN
Junction Temperature
Shutdown
Reset from Shutdown
+165
+150
°
C
°
C
POWER SUPPLY
Specified Operating Voltage
Operating Voltage Range
Quiescent Current
+24
V
V
+9
+60
5
I
O
= 0
3.5
mA
TEMPERATURE RANGE
Specified Range
Operating Range
Storage Range
Thermal Resistance,
θ
JC
7-Lead DDPAK, 7-Lead TO-220
Thermal Resistance,
θ
JA
7-Lead DDPAK, 7-Lead TO-220
–40
–55
–65
+85
+125
+150
°
C
°
C
°
C
3
°
C/W
No Heat Sink
65
°
C/W
NOTES:(1) Under-scale current for T
< 100
°
C—see Under-Scale Current vs Temperature typical performance curve. (2) Logic High enables output (normal
operation). (3) Constant dc output to PWM (pulse-width modulated) time. (4) Maximum delay is determined by an external capacitor. Pulling the Delay Adjust Pin
low corresponds to an infinite (continuous) delay. (5) Connecting the Delay Adjust pin to +5V reduces delay time to 3
μ
s. (6) V
IN
at pin 3 to percent of duty cycle
at pin 6. (7) A fault results from over-temperature, over-current, or under-current conditions.
The information provided herein is believed to be reliable; however, BURR-BROWN assumes no responsibility for inaccuracies or omissions. BURR-BROWN assumes
no responsibility for the use of this information, and all use of such information shall be entirely at the user’s own risk. Prices and specifications are subject to change
without notice. No patent rights or licenses to any of the circuits described herein are implied or granted to any third party. BURR-BROWN does not authorize or warrant
any BURR-BROWN product for use in life support devices and/or systems.
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