
Switching Characteristics
V
CC
e a
5.0V, T
A
e a
25
§
C
Symbol
Parameter
C
L
e
15 pF
Units
Min
Max
t
PLH
t
PHL
Propagation Delay
S
0
to Z
a
70
60
ns
t
PLH
t
PHL
Propagation Delay
S
0
to Z
a
55
50
ns
t
PLH
t
PHL
Propagation Delay
I
0
to Z
a
70
65
ns
t
PLH
t
PHL
Propagation Delay
S
0
to Z
a
40
60
ns
Functional Description
The 93L09 dual 4-input multiplexers are able to select two
bits of either HIGH or LOW data or control from up to four
sources, in one package. The 93L09 is the logical imple-
mentation of two-pole, four-position switch, with the position
of the switch being set by the logic levels supplied to the
two select inputs. Both assertion and negation outputs are
provided for both multiplexers. The logic equations for the
outputs are shown below:
Za
e
I0a
#
S1
#
S0
a
I1a
#
S1
#
S0
a
I2a
#
S1
#
S0
a
I3a
#
S1
#
S0
Zb
e
I0b
#
S1
#
S0
a
I1b
#
S1
#
S0
a
I2a
#
S1
#
S0
a
I3b
#
S1
#
S0
The 93L09 is frequently used to move data from a group of
registers to a common output bus. The particular register
from which the data came would be determined by the state
of the select inputs. A less obvious application is as a func-
tion generator. The 93L09 can generate two functions of
three variables. This is useful for implementing random gat-
ing functions.
Truth Table
Select
Inputs
Inputs
(a or b)
Outputs
(a or b)
S0
S1
I0
I1
I2
I3
Z
Z
L
L
H
H
L
L
L
L
L
H
X
X
X
X
L
H
X
X
X
X
X
X
X
X
L
H
L
H
H
L
H
L
L
L
H
H
H
H
H
H
X
X
X
X
X
X
X
X
L
H
X
X
X
X
L
H
L
H
L
H
H
L
H
L
H
e
HIGH voltage level
L
e
LOW voltage level
X
e
Immaterial
Logic Diagram
TL/F/9602–3
3