參數(shù)資料
型號(hào)： DM4M32SJ-10
英文描述： Enhanced DRAM (EDRAM) Module
中文描述： 增強(qiáng)的DRAM（eDRAM內(nèi)存）模塊
文件頁(yè)數(shù)： 7/21頁(yè)
文件大?。?/td> 124K
代理商： DM4M32SJ-10
2-41
Symbol
Parameters
Min
Max
Test Conditions
V
CC
Supply Voltage
4.75V
All Voltages Referenced to V
SS
V
IH
0V
≤
V
IN
≤
6.5V, All Other Pins Not Under Test = 0V
0V
≤
V
IN
, 0V
≤
V
OUT
≤
5.5V
I
OUT
= - 5mA
I
OUT
= 4.2mA
V
CC
+1
0.8V
10μA
0.4V
10μA
2.4V
-1.0V
-10μA
-10μA
2.4V
Input High Voltage
Input Low Voltage
Input Leakage Current
Output Leakage Current
Output High Level
Output Low Level
5.25V
V
IL
V
OH
V
OL
V
i(L)
V
0(L)
Symbol
Operating Current
-15 Max
Test Condition
I
CC1
Random Read
/RE, /CAL, /G and Addresses Cycling: t
C
= t
C
Minimum
/CAL, /G and Addresses Cycling: t
PC
= t
PC
Minimum
All Control Inputs Stable
≥
V
CC
- 0.2V, Outputs Driven
/RE, /CAL, /WE and Addresses Cycling: t
C
= t
C
Minimum
/CAL, /WE and Addresses Cycling: t
PC
= t
PC
Minimum
115mA
90mA
1mA
105mA
Fast Page Mode Read
Static Column Read
Standby
Random Write
Fast Page Mode Write
180mA
150mA
33MHz Typ
(1)
65mA
55mA
1mA
50mA
110mA
135mA
Notes
2, 3
2, 4
2, 4
2, 3
2, 4
/G and Addresses Cycling: t
AC
= t
AC
Minimum
(1) “33MHz Typ” refers to worst case I
CC
expected in a systemoperating wth a 33MHz memory bus. See power applications note for further details. This parameter is not 100% tested
or guaranteed.
(2) I
CC
is dependent on cycle rates and is measured wth CMOS levels and the outputs open.
(3) I
CC
is measured wth a maximumof one address change while /RE = V
IL
(4) I
CC
is measured wth a maximumof one address change while /CAL = V
IH
-12 Max
225mA
145mA
110mA
1mA
190mA
135mA
See "Estimating EDRAM Operating Power" Application Note
—
Average Typical
Operating Current
30mA
—
1
I
CC2
I
CC3
I
CC4
I
CC5
I
CC6
I
CCT
Electrical Characteristics
T
A
= 0 to 70°C (Commercial), -40 to 85°C (Industrial)
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