參數(shù)資料
型號(hào)： DK1241A
廠商： Electronic Theatre Controls, Inc.
英文描述： Advanced Microstepping Motion Control Chipset
中文描述： 高級(jí)微步運(yùn)動(dòng)控制芯片組
文件頁(yè)數(shù)： 15/60頁(yè)
文件大?。?/td> 422K
代理商： DK1241A
15
IC
CP Chip Pinouts
CP
Pin Name
Pin #
Description/Functionality
PWMMag1A
PWMMag1B
PWMMag2A
PWMMag2B
8
7
2
1
PWMmotor output magnitude signals (output). When the chip set is in PWMoutput mode
these pins provide the Pulse Width Modulated magnitude signal to the motor amplifier. Two
phases of command signal are output per motor axis, indicated phase A and phase B, with
the axis number indicated 1 or 2.
NOTE: For MC1241A all four pins are valid. For MC1141A pins for axes 1 only are valid.
Invalid axis pins can be left unconnected.
The PWMresolution is 10 bits, frequency = 97.6 kHz.
PWMmotor output direction signals (output). When the chip set is in PWMoutput mode
these pins provide the sign signal to the motor amplifier. Two phases of command signals are
output per motor axis, indicated phase A and phase B, with the axis number indicated 1 or 2.
CP
PWMSign1A
PWMSign1B
PWMSign2A
PWMSign2B
56
55
54
53
NOTE: For MC1241A all four pins are valid. For MC1141A pins for axes 1 only are valid.
Invalid axis pins can be left unconnected.
Positive limt switch input for axis 1-2. These signals provide directional limt inputs for the
positive-side travel limt of the axis. Upon powerup these signals default to "active high"
interpretation, but the interpretation can be set explicitly using the SET_LMT_SENSE
command. (See Host Command Section for more info.) If not used these signals should be
tied low for the default interpretation, or tied high if the interpretation is reversed.
CP
PosLimt1
PosLimt2
52
45
NOTE: For MC1241A both pins are valid. For MC1141A pins for axes 1 only are valid. Invalid
axis pins can be left un connected.
Negative limt switch input for axis 1-2. These signals provide directional limt inputs for the
negative-side travel limt of the axis. Upon powerup these signals default to "active high"
interpretation, but the interpretation can be set explicitly using the SET_LMT_SENSE
command. (See Host Command Section for more info.) If not used these signals should be
tied low for the default interpretation, or tied high if the interpretation is reversed.
CP
NegLimt1
NegLimt2
51
44
NOTE: For MC1241A both pins are valid. For 1141 pins for axis 1 only are valid. Invalid axis
pins can be left un connected.
Axis Address used during 16-bit DAC motor command output. These signals encode the
motor output axis address as shown in the table below:
CP
DAC16Addr0
DAC16Addr1
30
29
Dac16Addr1 Dac16Addr0 Addressed Encoder
Low
Low
Low
High
High
Low
High
High
Axis 1 phase A
Axis 1 phase B
Axis 2 phase A
Axis 2 phase B
To write a valid DAC motor command value DACSlct (I/O chip) and I/OAddr0-3 (CP chip)
must be high, and I/OWrite (CP chip) must be low. The 16 bit DAC data word is organized as
follows: High twelve bits are in Data0-11 (CP chip), and low 4 bits are in DACLow0-3 (CP
chip).
Clock In (input). This pin provides the chip set master clock (Fclk = 25.0 Mhz)
CP
ClkIn
24
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